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SN8P1602A Datasheet(PDF) 54 Page - SONiX Technology Company |
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SN8P1602A Datasheet(HTML) 54 Page - SONiX Technology Company |
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54 / 76 page  SN8P1602B 8-Bit Micro-Controller SONiX TECHNOLOGY CO., LTD Page 54 Version 1.1 9 9 9 INTERRUPT OVERVIEW The SN8P1602B provides 2 interrupt sources, including 1 internal interrupt (TC0) and 1 external interrupt (INT0). The external interrupt can wakeup the chip while the system is switched from power down mode to high-speed normal mode. Once interrupt service is executed, the GIE bit in STKP register will clear to “0” for stopping other interrupt request. On the contrast, when interrupt service exits, the GIE bit will set to “1” to accept the next interrupts’ request. All of the interrupt request signals are stored in INTRQ register. SN8P1602B Note: The GIE bit must enable during all interrupt operation. INTRQ 2-bit Latchs TC0IRQ Interrupt enable gating Global interrupt request signal Interrupt vector address (0008H) TC0 time out INTEN Interrupt enable register The interrupt trigger edge : INT0 = falling edge P00IRQ INT0 trigger INTRQ 2-bit Latchs TC0IRQ Interrupt enable gating Global interrupt request signal Interrupt vector address (0008H) TC0 time out INTEN Interrupt enable register The interrupt trigger edge : INT0 = falling edge P00IRQ INT0 trigger |
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