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LTC2269

2269f

APPLICATIONS INFORMATION

Figure 8a. Reference Circuit

VREF

REFH

SENSE

TIE TO VDD FOR 2.1V RANGE;

TIE TO GND FOR 1.05V RANGE;

SENSE FOR

0.625V < VSENSE < 1.300V

1.25V

REFL

INTERNAL ADC

HIGH REFERENCE

BUFFER

2269 F08

LTC2269

5Ω

0.84x

DIFF AMP

INTERNAL ADC

LOW REFERENCE

C1: 2.2μF LOW INDUCTANCE

INTERDIGITATED CAPACITOR

TDK CLLE1AX7S0G225M

MURATA LLA219C70G225M

AVX W2L14Z225M

OR EQUIVALENT

1.25V BANDGAP

REFERENCE

0.625V

RANGE

DETECT

AND

CONTROL

2.2μF

1μF

–

Reference

The LTC2269 has an internal 1.25V voltage reference. For

a 2.1V input range using the internal reference, connect

SENSE to VDD. For a 1.05V input range using the internal

reference, connect SENSE to ground. For a 2.1V input

range with an external reference, apply a 1.25V reference

voltage to SENSE (Figure 9).

The input range can be adjusted by applying a voltage to

SENSE that is between 0.625V and 1.30V. The input range

will then be 1.68 • VSENSE.

The VREF, REFH and REFL pins should be bypassed as

shown in Figure 8a. A low inductance 2.2μF interdigitated

capacitor is recommended for the bypass between REFH

and REFL. This type of capacitor is available at a low cost

from multiple suppliers.

Alternatively, C1 can be replaced by a standard 2.2μF

capacitor between REFH and REFL. The capacitor should

be as close to the pins as possible (not on the back side

of the circuit board).

Figure 8b. Alternative REFH/REFL Bypass Circuit

Figure 8c. Recommended Layout for the REFH/REFL

Bypass Circuit in Figure 8a

Figure 8d. Recommended Layout for the REFH/REFL

Bypass Circuit in Figure 8b

REFH

REFL

2269 F08b

LTC2269

CAPACITORS ARE 0402 PACKAGE SIZE

1μF

2.2μF

1μF

Figures 8c and 8d show the recommended circuit board

layout for the REFH/REFL bypass capacitors. Note that in

Figure 8c, every pin of the interdigitated capacitor (C1)

is connected since the pins are not internally connected

in some vendors’ capacitors. In Figure 8d, the REFH and

REFL pins are connected by short jumpers in an internal

layer. To minimize the inductance of these jumpers they

can be placed in a small hole in the GND plane on the

second board layer.

Figure 9. Using an External 1.25V Reference

SENSE

1.25V

EXTERNAL

REFERENCE

2.2μF

1μF

VREF

2269 F09

LTC2269

2269 F08c

2269 F08d

LTC2269 Datasheet(PDF) 18 Page - Linear Technology

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