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WM8311 Datasheet(PDF) 50 Page - Wolfson Microelectronics plc |
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WM8311 Datasheet(HTML) 50 Page - Wolfson Microelectronics plc |
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50 / 302 page ![]() WM8311 Pre-Production w PP, May 2012, Rev 3.1 50 state; this may be used to provide clocking to the processor in the OFF state, provided that the selected power domain for that GPIO pin remains enabled in the OFF state. The CLKOUT output is always disabled in the OFF power state. A separate internal RC oscillator generates the required clocks for the integrated DC-DC Converters on the WM8311. Note that a 2MHz ‘External Power Clock’, derived from this oscillator, may be output on a GPIO pin to provide synchronised clocking of external DC-DC Converters if required (see Section 21). The 2MHz External Power Clock is only enabled when either of the External Power Enable signals EPE1 or EPE2 is asserted. The External Power Enable (EPE) signals are controlled as described in Section 15.3. Note that the CLKOUT_ENA control register is locked by the WM8311 User Key. This register can only be changed by writing the appropriate code to the Security register, as described in Section 12.4. ADDRESS BIT LABEL DEFAULT DESCRIPTION R16528 (4090h) Clock Control 1 15 CLKOUT_EN A 0 CLKOUT output enable 0 = Disabled 1 = Enabled Protected by user key 13 CLKOUT_OD 0 CLKOUT pin configuration 0 = CMOS 1 = Open Drain 10:8 CLKOUT_SLO T 000 CLKOUT output enable ON slot select 000 = Do not enable 001 = Enable in Timeslot 1 010 = Enable in Timeslot 2 011 = Enable in Timeslot 3 100 = Enable in Timeslot 4 101 = Enable in Timeslot 5 110 = Do not enable 111 = Do not enable 6:4 CLKOUT_SLP SLOT 000 CLKOUT output SLEEP slot select 000 = Controlled by CLKOUT_ENA 001 = Disable in Timeslot 5 010 = Disable in Timeslot 4 011 = Disable in Timeslot 3 100 = Disable in Timeslot 2 101 = Disable in Timeslot 1 110 = Controlled by CLKOUT_ENA 111 = Controlled by CLKOUT_ENA 0 CLKOUT_SR C 0 CLKOUT output source select 0 = FLL output 1 = 32.768kHz oscillator R16529 (4091h) Clock Control 2 15 XTAL_INH 0 Crystal Start-Up Inhibit 0 = Disabled 1 = Enabled When XTAL_INH=1, the ‘ON’ transition is inhibited until the crystal oscillator is valid 13 XTAL_ENA 0 Crystal Oscillator Enable 0 = Disabled at all times 1 = Enabled in OFF, ON and SLEEP states (Note that the BACKUP behaviour is determined by XTAL_BKUPENA.) 12 XTAL_BKUPE NA 1 Selects the RTC and 32.768kHz oscillator in BACKUP state |
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