WM8311 datasheet(108/302 Pages) WOLFSON

108 / 302 page

WM8311

Pre-Production

PP, May 2012, Rev 3.1

108

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R16397

(400Dh)

System Status

PWR_SRC_BATT

Battery Power Source status

0 = Battery is not supplying current

1 = Battery is supplying current

PWR_WALL

Wall Adaptor status

0 = Wall Adaptor voltage not present

1 = Wall Adaptor voltage is present

PWR_USB

USB status

0 = USB voltage not present

1 = USB voltage is present

Table 52 Power Source Status Registers

17.2 BATTERY POWERED OPERATION

The WM8311 selects Battery power via BATTVDD when the battery voltage is higher than the

WALLVDD and USBVDD supply voltages. In practical usage, this means the Battery is used when

the Wall and USB supplies are both disconnected.

The battery will be used to supplement the USB or Wall Adaptor supplies when required.

If the WALLVDD or USBVDD supply becomes available during battery operation, then the selected

power source is adjusted accordingly.

When an external FET is provided between BATTVDD and SYSVDD, as described in Section 17.1,

the BATTFETENA

¯¯¯¯¯¯¯¯¯¯¯ pin functionality must be enabled by setting BATT_FET_ENA as described in

Table 53.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R16390

(4006h)

Reset

Control

BATT_FET_ENA

Enables the FET gate functionality on

the BATTFETENA pin. (Note this pin

is Active Low.)

0 = Disabled

1 = Enabled

Note - this bit is reset to 0 when the

OFF power state is entered.

Table 53 Configuring the Battery Power Operation

17.3 WALL ADAPTOR POWERED OPERATION

The WM8311 selects Wall Adaptor power whenever this supply is within the normal operating limits of

4.3V to 5.5V and WALLVDD is higher than BATTVDD. The Wall adaptor power source is also

selected below 4.3V if USBVDD is less than 4.3V and WALLVDD is higher than BATTVDD.

Note that USBVDD supply is not used when WALLVDD is within its normal operating limits, even if

the USBVDD supply is higher than the WALLVDD supply.

When the WALLVDD supply is selected and a Battery is connected, then battery charging is possible

in the ON or SLEEP power states; see Section 17.7.

The drive strength of the Wall FET gate connection, WALLFETENA

¯¯¯¯¯¯¯¯¯¯¯¯, can be selected using the

WALL_FET_ENA_DRV_STR register bit as described in Table 54.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R16390

(4006h)

Reset

Control

WALL_FET_ENA_D

RV_STR

Sets the drive strength of the

WALLFETENA pin. (Note this pin is

Active Low.)

0 = Weak drive (500kOhm)

1 = Strong drive (50kOhm)

Table 54 Configuring the Wall Adaptor Power Operation

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