AD7705/AD7706

–6–

REV. A

PIN FUNCTION DESCRIPTIONS

Pin No.

Mnemonic

Function

1

SCLK

Serial Clock. Schmitt-Triggered Logic Input. An external serial clock is applied to this input

to access serial data from the AD7705/AD7706. This serial clock can be a continuous clock

with all data transmitted in a continuous train of pulses. Alternatively, it can be a noncon-

tinuous clock with the information being transmitted to the AD7705/AD7706 in smaller

batches of data.

2

MCLK IN

Master Clock signal for the device. This can be provided in the form of a crystal/resonator or

external clock. A crystal/resonator can be tied across the MCLK IN and MCLK OUT pins.

Alternatively, the MCLK IN pin can be driven with a CMOS-compatible clock and MCLK

OUT left unconnected. The part can be operated with clock frequencies in the range

500 kHz to 5 MHz.

3

MCLK OUT

When the master clock for the device is a crystal/resonator, the crystal/resonator is connected

between MCLK IN and MCLK OUT. If an external clock is applied to MCLK IN, MCLK

OUT provides an inverted clock signal. This clock can be used to provide a clock source for

external circuitry and is capable of driving one CMOS load. If the user does not require it,

this MCLK OUT can be turned off via the CLK DIS bit of the Clock Register. This ensures

that the part is not burning unnecessary power driving capacitive loads on MCLK OUT.

4

CS

Chip Select. Active low Logic Input used to select the AD7705/AD7706. With this input

hard-wired low, the AD7705/AD7706 can operate in its three-wire interface mode with

SCLK, DIN and DOUT used to interface to the device.

CS can be used to select the device

in systems with more than one device on the serial bus or as a frame synchronization signal in

communicating with the AD7705/AD7706.

5

RESET

Logic Input. Active low input that resets the control logic, interface logic, calibration

coefficients, digital filter and analog modulator of the part to power-on status.

6

AIN2(+)[AIN1]

AD7705: Positive input of the differential Analog Input Channel 2. AD7706: Analog Input

Channel 1.

7

AIN1(+)[AIN2]

AD7705: Positive input of the differential Analog Input Channel 1. AD7706: Analog Input

Channel 2.

8

AIN1(–)[COMMON]

AD7705: Negative input of the differential Analog Input Channel 1. AD7706: COMMON

Input. Analog inputs for Channels 1, 2 and 3 are referenced to this input.

9

REF IN(+)

Reference Input. Positive input of the differential Reference Input to the AD7705/AD7706.

The reference input is differential with the provision that REF IN(+) must be greater than

PIN CONFIGURATIONS

TOP VIEW

(Not to Scale)

16

15

14

13

12

11

10

9

1

2

3

4

5

6

7

8

SCLK

MCLK IN

MCLK OUT

CS

RESET

AIN2(+)

AIN1(+)

AIN1(–)

GND

DIN

DOUT

DRDY

AIN2(–)

REF IN(–)

REF IN(+)

AD7705

TOP VIEW

(Not to Scale)

16

15

14

13

12

11

10

9

1

2

3

4

5

6

7

8

SCLK

MCLK IN

MCLK OUT

CS

RESET

AIN1

AIN2

COMMON

GND

DIN

DOUT

DRDY

AIN3

REF IN(–)

REF IN(+)

AD7706