AD7705 datasheet(16/32 Pages) AD

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AD7705/AD7706

–16–

REV. A

ANALOG INPUT

Analog Input Ranges

The AD7705 contains two differential analog input pairs

AIN1(+), AIN1(–) and AIN2(+), AIN2(–). These input pairs

provide programmable-gain, differential input channels that

can handle either unipolar or bipolar input signals. It should be

noted that the bipolar input signals are referenced to the re-

spective AIN(–) input of each input pair. The AD7706 contains

three pseudo differential analog input pairs AIN1, AIN2 and

AIN3, which are referenced to the COMMON input on the part.

In unbuffered mode, the common-mode range of the input is

from GND to VDD, provided that the absolute value of the

analog input voltage lies between GND – 30 mV and VDD

+ 30 mV. This means that in unbuffered mode the part can

handle both unipolar and bipolar input ranges for all gains.

Absolute voltages of GND – 200 mV can be accommodated on

the analog inputs at 25

°C without degradation in performance,

but leakage current increases appreciably with increasing tem-

perature. In buffered mode, the analog inputs can handle

much larger source impedances, but the absolute input voltage

range is restricted to between GND + 50 mV to VDD – 1.5 V

which also places restrictions on the common-mode range. This

means that in buffered mode there are some restrictions on the

allowable gains for bipolar input ranges. Care must be taken in

setting up the common-mode voltage and input voltage range

so that the above limits are not exceeded, otherwise there will

be a degradation in linearity performance.

In unbuffered mode, the analog inputs look directly into the

7 pF input sampling capacitor, CSAMP. The dc input leakage

current in this unbuffered mode is 1 nA maximum. As a result,

the analog inputs see a dynamic load that is switched at the

input sample rate (see Figure 11). This sample rate depends on

master clock frequency and selected gain. CSAMP is charged to

AIN(+) and discharged to AIN(–) every input sample cycle.

The effective on-resistance of the switch, RSW, is typically 7 k

Ω.

CSAMP must be charged through RSW and through any external

source impedances every input sample cycle. Therefore, in

unbuffered mode, source impedances mean a longer charge time

for CSAMP and this may result in gain errors on the part. Table

XIV shows the allowable external resistance/capacitance values,

for unbuffered mode, such that no gain error to the 16-bit level

is introduced on the part. Note that these capacitances are

total capacitances on the analog input, external capacitance

plus 10 pF capacitance from the pins and lead frame of the device.

AIN(+)

AIN(–)

SWITCHING FREQUENCY DEPENDS ON

fCLKIN AND SELECTED GAIN

RSW (7k

TYP)

CSAMP

(7pF)

HIGH

IMPEDANCE

VBIAS

Figure 11. Unbuffered Analog Input Structure

Table XIV. External R, C Combination for No 16-Bit Gain

Error (Unbuffered Mode Only)

External Capacitance (pF)

Gain

100

500

1000

5000

368 k

Ω

90.6 k

Ω 54.2 kΩ

14.6 k

Ω 8.2 kΩ 2.2 kΩ

177.2 k

Ω 44.2 kΩ 26.4 kΩ

7.2 k

Ω

4 k

Ω

1.12 k

Ω

82.8 k

Ω

21.2 k

Ω 12.6 kΩ

3.4 k

Ω 1.94 kΩ 540 Ω

8–128

35.2 k

Ω

9.6 k

Ω

5.8 k

Ω

1.58

Ω 880 Ω

240

Ω

In buffered mode, the analog inputs look into the high-impedance

inputs stage of the on-chip buffer amplifier. CSAMP is charged

via this buffer amplifier such that source impedances do not

affect the charging of CSAMP. This buffer amplifier has an offset

leakage current of 1 nA. In this buffered mode, large source

impedances result in a small dc offset voltage developed across

the source impedance, but not in a gain error.

Input Sample Rate

The modulator sample frequency for the AD7705/AD7706

remains at fCLKIN/128 (19.2 kHz @ fCLKIN = 2.4576 MHz) re-

gardless of the selected gain. However, gains greater than 1 are

achieved by a combination of multiple input samples per modu-

lator cycle and a scaling of the ratio of reference capacitor to

input capacitor. As a result of the multiple sampling, the input

sample rate of the device varies with the selected gain (see Table

XV). In buffered mode, the input is buffered before the input

sampling capacitor. In unbuffered mode, where the analog

input looks directly into the sampling capacitor, the effective

input impedance is 1/CSAMP

× f

S where CSAMP is the input sam-

pling capacitance and fS is the input sample rate.

Table XV. Input Sampling Frequency vs. Gain

Gain

Input Sampling Frequency (fS)

1fCLKIN/64 (38.4 kHz @ fCLKIN = 2.4576 MHz)

× f

CLKIN/64 (76.8 kHz @ fCLKIN = 2.4576 MHz)

× f

CLKIN/64 (76.8 kHz @ fCLKIN = 2.4576 MHz)

8–128

× f

CLKIN/64 (307.2 kHz @ fCLKIN = 2.4576 MHz)

Bipolar/Unipolar Inputs

The analog inputs on the AD7705/AD7706 can accept either

unipolar or bipolar input voltage ranges. Bipolar input ranges do

not imply that the part can handle negative voltages on its analog

input, since the analog input cannot go more negative than

–30 mV to ensure correct operation of these parts. The input

channels are fully differential. As a result, on the AD7705, the

voltage to which the unipolar and bipolar signals on the AIN(+)

input are referenced is the voltage on the respective AIN(–)

input. On the AD7706, the voltages applied to the analog input

channels are referenced to the COMMON input. For example, if

AIN1(–) is +2.5 V and the AD7705 is configured for unipolar

operation with a gain of 2 and a VREF of +2.5 V, the input voltage

range on the AIN1(+) input is +2.5 V to +3.75 V. If AIN1(–) is

+2.5 V and the AD7705 is configured for bipolar mode with a

gain of 2 and a VREF of +2.5 V, the analog input range on the

AIN1(+) input is +1.25 V to +3.75 V (i.e., 2.5 V

± 1.25 V). If

AIN1(–) is at GND, the part cannot be configured for bipolar

ranges in excess of

±30 mV.

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