AD7713 datasheet(23/28 Pages) AD

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REV. C

AD7713

operations (where 24 bits of data are read into an 8-bit serial

similar, but in this case the status of DRDY can be ignored. The

A0 line is brought low when the RFS line is brought low when

reading from the control register.

The flowchart also shows the bits being reversed after they have

been read in from the serial port. This depends on whether the

microprocessor expects the MSB of the word first or the LSB of

the word first. The AD7713 outputs the MSB first.

The flowchart for Figure 16 is for a single 24-bit write operation

to the AD7713 control or calibration registers. This shows data

being transferred from data memory to the accumulator before

being written to the serial buffer. Some microprocessor systems

will allow data to be written directly to the serial buffer from

data memory. The writing of data to the serial buffer from the

accumulator will generally consist of either two or three write

operations, depending on the size of the serial buffer.

The flowchart also shows the option of the bits being reversed

before being written to the serial buffer. This depends on

whether the first bit transmitted by the microprocessor is the

MSB or the LSB. The AD7713 expects the MSB as the first bit

in the data stream. In cases where the data is being read or be-

ing written in bytes and the data has to be reversed, the bits will

have to be reversed for every byte.

END

START

CONFIGURE &

INITIALIZE µC/µP

SERIAL PORT

BRING

RFS & A0 LOW

REVERSE ORDER OF

BITS

BRING

RFS, TFS &

A0 HIGH

LOAD DATA FROM

ADDRESS TO

ACCUMULATOR

WRITE DATA FROM

ACCUMULATOR TO

SERIAL BUFFER

BRING

TFS & A0 HIGH

Figure 16. Flowchart for Single Write Operation to the

AD7713

AD7713 to 8051 Interface

Figure 17 shows an interface between the AD7713 and the

8XC51 microcontroller. The AD7713 is configured for its exter-

nal clocking mode while the 8XC51 is configured in its Mode 0

serial interface mode. The DRDY line from the AD7713 is con-

nected to the Port P1.2 input of the 8XC51 so the DRDY line

is polled by the 8XC51. The DRDY line can be connected to

the INT1 input of the 8XC51 if an interrupt driven system is

preferred.

RFS

AD7713

SDATA

SCLK

TFS

P1.0

P3.0

P3.1

P1.1

P1.2

MODE

DRDY

P1.3

SYNC

DVDD

8XC51

Figure 17. AD7713 to 8XC51 Interface

Table V shows some typical 8XC51 code used for a single

24-bit read from the output register of the AD7713. Table V

shows some typical code for a single write operation to the con-

trol register of the AD7713. The 8XC51 outputs the LSB first

in a write operation while the AD7713 expects the MSB first, so

the data to be transmitted has to be rearranged before being

written to the output serial register. Similarly, the AD7713 out-

puts the MSB first during a read operation while the 8XC51

expects the LSB first. Therefore, the data which is read into the

serial buffer needs to be rearranged before the correct data word

from the AD7713 is available in the accumulator.

Table V. 8XC51 Code for Reading from the AD7713

MOV SCON,#00010001B;

Configure 8051 for MODE 0

MOV IE,#00010000B;

Disable All Interrupts

SETB 90H;

Set P1.0, Used as RFS

SETB 91H;

Set P1.1, Used as TFS

SETB 93H;

Set P1.3, Used as A0

MOV R1,#003H;

Sets Number of Bytes to Be Read in

A Read Operation

MOV R0,#030H;

Start Address for Where Bytes Will

Be Loaded

MOV R6,#004H;

Use P1.2 as DRDY

WAIT:

NOP;

MOV A,P1;

Read Port 1

ANL A,R6;

Mask Out All Bits Except DRDY

JZ READ;

If Zero Read

SJMP WAIT;

Otherwise Keep Polling

READ:

CLR 90H;

Bring RFS Low

CLR 98H;

Clear Receive Flag

POLL:

JB 98H, READ1

Tests Receive Interrupt Flag

SJMP POLL

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