AD818

REV. B

–12–

OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).

8-Lead Plastic Mini-DIP (N) Package

0.011±0.003

(0.28±0.08)

0.30 (7.62)

REF

15

°

0

°

PIN 1

4

5

8

1

0.25

(6.35)

0.31

(7.87)

0.10

(2.54)

BSC

SEATING

PLANE

0.035±0.01

(0.89±0.25)

0.18±0.03

(4.57±0.76)

0.033

(0.84)

NOM

0.018±0.003

(0.46±0.08)

0.125

(3.18)

MIN

0.165±0.01

(4.19±0.25)

0.39 (9.91) MAX

8-Lead SOIC (R) Package

0.0098 (0.25)

0.0075 (0.19)

0.0500 (1.27)

0.0160 (0.41)

8

0

0.0196 (0.50)

0.0099 (0.25)

45

85

4

1

0.1968 (5.00)

0.1890 (4.80)

0.2440 (6.20)

0.2284 (5.80)

PIN 1

0.1574 (4.00)

0.1497 (3.80)

0.0500 (1.27)

BSC

0.0688 (1.75)

0.0532 (1.35)

SEATING

PLANE

0.0098 (0.25)

0.0040 (0.10)

0.0192 (0.49)

0.0138 (0.35)

A HIGH SPEED, THREE OP AMP IN AMP

The circuit of Figure 41 uses three high speed op amps: two

AD818s and an AD817. This high speed circuit lends itself well

to CCD imaging and other video speed applications. It has the

optional flexibility of both dc and ac trims for common-mode

rejection, plus the ability to adjust for minimum settling time.

2pF

5pF

A1

AD818

2-8 pF

SETTLING

TIME A.C.

CMR ADJUST

2k

970

50

D.C. CMR

ADJUST

3pF

A2

AD818

A3

AD817

+15V

COMMON

–15V

10µF

10µF

0.1µF

0.1µF

1µF

1µF

PIN 7

EACH

AMPLIFIER

0.1µF

0.1µF

PIN 4

EACH

AMPLIFIER

EACH

AMPLIFIER

BANDWIDTH, SETTLING TIME, & TOTAL HARMONIC DISTORTION VS. GAIN

GAIN

CADJ

(pF)

SMALL

SIGNAL

BANDWIDTH

SETTLING

TIME

TO 0.1%

THD + NOISE

BELOW INPUT LEVEL

@ 10kHz

3

10

100

1k

222

20

2-8

2-8

2-8

14.7 MHz

4.5 MHz

960 kHz

200ns

370ns

2.5µs

82 dB

81 dB

71 dB

1k

5pF

1k

1k

1k

1k

Figure 41. High Speed 3 Op Amp In Amp