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AD8303 Datasheet(PDF) 13 Page - Analog Devices |
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AD8303 Datasheet(HTML) 13 Page - Analog Devices |
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13 / 16 page ![]() AD8303 REV. 0 –13– AD8303-MC68HC11 INTERFACE The circuit illustrated in Figure 33 shows a serial interface between the AD8303 and the MC68HC11 8-bit micro- processor. The MOSI output drives the AD8303’s serial data input, SDI, while SCK drives the clock (CLK). The DAC’s CS, LDA , LDB, MSB and RS inputs are driven by lines PD5 and PC0–PC3, respectively. (PD3) MOSI (PD4) SCK (PD5) SS PC0 PC1 PC2 PC3 SDI CLK CS LDA LDB MSB RS MC68HC11 AD8303 NOTE: ADDITIONAL PINS OMITTED FOR CLARITY Figure 33. AD8303-MC68HC11 Serial Interface To load data into the AD8303, the 68HC11’s CPOL and CPHA bits are set high. This action configures the µC to transfer data on the rising edge of the serial clock. After CS is set low, two bytes of data are sent to the AD8303 using the format shown in Figure 28. Then LDA or LDB are strobed low, transferring the serial-input register contents to the appropriate DAC. The RS and MSB inputs allow the DAC to be reset to either zero volts or half scale at any time. AN 8051 µC INTERFACE A typical interface between the AD8303 and an 8051 µC is shown in Figure 34. This interface also uses the µC’s internal serial port. The serial port is programmed for Mode 0 operation, which functions as a simple 8-bit shift register. The 8051’s Port 3.0 pin functions as the serial data output, while Port 3.1 serves as the serial clock. The LDA and LDB pins are controlled by the 8051’s Port 1.0 and Port 1.1 lines, respectively. (P3.0) RxD (P3.1) TxD P1.0 P1.1 SDI CLK LDA LDB 80CL51 AD8303 NOTE: ADDITIONAL PINS OMITTED FOR CLARITY RS CS MSB SHDN + 7 6 8 10 9 5 11 12 VDD 10k 1µF VDD Figure 34. AD8303-80CL51 Serial Interface The 8051’s serial data transmission is straightforward. When data is written to the serial buffer register (SBUF, at Special Function Register location 99H), the data is automatically converted to serial format and clocked out via Port 3.0 and Port 3.1 After 8 bits have been transmitted, the Transmit Interrupt flag (SCON.1) is set and the next 8 bits can be transmitted. The circuit of Figure 34 demonstrates “hardwiring” many of the AD8303 features which may not have to be changed within a given design. For example, the reset feature is controlled by a resistor and capacitor. This produces a power-on reset pulse without requiring a µC I/O pin. The MSB pin can be hardwired to VDD or ground, depending on whether a reset to 0 V or half scale is required. If the AD8303 is the only device on the serial interface, CS can also be tied to ground. Finally, SHDN can be tied to VDD if the shutdown feature will not be used. Software for the interface of Figure 34 is shown in Figure 35. This routine sends the 12-bit value placed in registers DAC_VAL0 and DAC_VAL1 to the DAC addressed by the two LSBs of DAC_ADDR. The subroutine begins by setting appropriate bits in the Serial Control register to configure the serial port for Mode 0 operation. The MSBs of the DAC value are obtained from memory location DAC_VAL1, adjusted to compensate for the 8051’s serial data format, and moved to the serial buffer register. At this point, serial data transmission begins automatically. When all 8 bits have been sent, the Transmit Interrupt bit is set, and the subroutine then proceeds to send the LSBs of the DAC value, stored at location DAC_VAL0. Next the LDA and LDB bits from DAC_ADDR are logically ANDed with Port1. This action sets the appropriate AD8303 DAC select input low and transfers the DAC value from the serial- input register to the DAC register, causing the DAC output voltage to change. Finally the LDA and LDB inputs are driven high to await the next DAC update. The 8051 sends data out of its shift register LSB first, while the AD8303 requires data MSB first. The subroutine therefore includes a BYTESWAP subroutine to reformat the data. This routine transfers the MSB-first byte at location SHIFTREG to an LSB-first byte at location SENDBYTE. The routine rotates the MSB of the first byte into the carry with a Rotate Left Carry instruction, then rotates the carry into the MSB of the second byte with a Rotate Right Carry instruction. After 8 loops, SENDBYTE contains the data in the proper format. The BYTESWAP routine in Listing C is convenient because the DAC data can be calculated in normal LSB form. |
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