REV. A

AD8306

–14–

Table III. Evaluation Board Setup Options

Component

Function

Default Condition

SW1

Device Enable

SW1 = A

AD8306 is in normal operating mode. In Position B, the ENBL pin is connected

to an SMA connector labeled Ext Enable. A signal can be applied to this connector

to enable/disable the AD8306.

R1

This pad is used to ac-couple INLO to ground for single-ended input drive. To drive

R1 = 0

Ω

the AD8306 differentially, R1 should be removed.

R/L, C1, C2

Input Interface.

The 52.3

Ω resistor in position R10, along with C1 and C2, create

R10 = 52.3

Ω

a high-pass input filter whose corner frequency (640 kHz) is equal to 1/(2

πRC),

C1 = C2 = 0.01

µF

where C = (C1)/2 and R is the parallel combination of 52.3

Ω and the AD8306’s

input impedance of 1000

Ω. Alternatively, the 52.3 Ω resistor can be replaced by

an inductor to form an input matching network. See Input Matching Network

section for more details.

R3/R4

Slope Adjust.

A simple slope adjustment can be implemented by adding a resistive

R3 = 0

Ω

divider at the VLOG output. R3 and R4, whose sum should be about 1 k

Ω, and

R4 =

never less than 40

Ω (see specs), set the slope according to the equation:

Slope = 20 mV/dB

× R4/(R3 + R4).

L1, C5, C6

Limiter Output Coupling.

C5 and C6 ac-couple the limiter’s differential outputs.

L1 = Open

By adjusting these values and installing an inductor in L1, an output matching

C5 = 0.01

µF

network can be implemented. To convert the limiter’s differential output to single-

C6 = 0.01

µF

ended, R11 and R12 (nominally 0

Ω) can be replaced with a surface mount balun

R9 = Open

such as the ETC1-1-13 (Macom). The balun can be grounded by soldering a 0

Ω

R10 = R11 = 0

Ω

into Position R9 (nominally open).

R8, LK1

Limiter Output Current.

With LK1 installed, R8 enables and sets the limiter

LK1 Installed. R8 = 402

Ω

output current. The limiter’s output current is set according to the equation

R6, R7 (Limited Load

Resistors) = 50

Ω

To disable the limiter (recommended if the limiter is not being used), LK1 should

be removed.

C7

RSSI Bandwidth Adjust

. The addition of C7 (farads) will lower the RSSI bandwidth of

C7 = Open

1

2

3

4

5

6

7

8

VLOG

VPS2

PADL

LMHI

LMLO

PADL

FLTR

LMDR

COM2

VPS1

PADL

INHI

INLO

PADL

COM1

ENBL

AD8306

9

10

11

14

15

16

12

13

C3

0.1 F

R10

52.3

C1

0.01 F

C2

0.01 F

R2

10

R1

0

EXT

ENABLE

C7 (OPEN)

R6

50

C4

0.1 F

R7

50

R3

0

R5

10

R4

(OPEN)

L1

(OPEN)

C5

0.01 F

C6

0.01 F

LK1

R8

402

SIG

INHI

SIG

INLO

A

BSW1

R12

0

R11

0

R9

(OPEN)

Figure 33. Evaluation Board Schematic