REV. 0

ADM1022

–14–

GENERAL PURPOSE LOGIC INPUT (GPI)

Pin 12 may be configured as an input for a second temperature

sensor input by setting Bit 7 of the Configuration Register, or it

may be used as a general purpose logic input by clearing Bit 7 of

the Configuration Register, which is its default condition. The

GPI input may be programmed to be active high or active low by

clearing or setting Bit 6 of the Configuration Register. The default

value is active high. Bit 4 of the Interrupt Status Register follows

the state (or inverted state) of GPI and will generate an interrupt

when it is set to one, like any other input to the Interrupt Status

Register. However, the GPI bit is not latched in the Status Register

and always reflects the current state (or inverted state) of the

GPI input. If it is one it will not be cleared by reading the

Status Register.

RESETS

The ADM1022 has a manual reset input, (Pin 2 –

MR), a bidi-

rectional reset pin, (Pin 3 –

RST1) and a reset output (Pin 7 –

RST2). These operate as follows:

Taking

MR low forces a system reset and takes the RST2 output

MR input has a 20 k

Ω pull-up resistor, and may be left uncon-

nected if not used.

MR is typically used to generate a system

reset from a front-panel push-button.

The

RST1 pin is a bidirectional I/O. It is asserted low as an out-

reset input to the ADM1022 in the same way as

MR. At power-

up,

RST2 will remain asserted for t

The

RST2 output is asserted low under any of the following

conditions:

≤ the MR input is low, as previously described,

–

RST1 is asserted low as an output or pulled low as an input,

POWER-ON RESET

When the ADM1022 is powered up, it will initiate a power-on

power-on reset threshold, with registers being reset to their

power-on values. Normal operation will begin when the supply

voltage rises above the reset threshold. Registers whose power-

on values are not shown have power on conditions that are

indeterminate (this includes the Value and Limit Registers). In

most applications, usually the first action after power-on would

be to write limits into the Limit Registers.

Power-on reset clears or initializes the following registers (the ini-

tialized values are shown in Table IV):

– Configuration Register

– Interrupt Status Register

– Interrupt Status Mirror Register

– Interrupt Mask Register

– Test Register

– Analog Output Register

– Programmable Trip Point Registers

Operation of the reset outputs at power-up, and for a manual

reset input, is shown in Figure 18. It should be noted that the

voltage there is insufficient gate drive voltage to turn on the out-

put FETs. If the device being reset and its pull-up resistor is

before being pulled low. If the device being reset and its pull-up

resistor use a separate supply voltage, the reset output will fol-

low that voltage until reset is asserted.

The ADM1022 can also be reset by taking

RST1 low as an input.

The above-mentioned registers will be reset to their default

values and the ADC will remain inactive as long as

RST1 is

below the reset threshold.

–1V

t

RST1

RST2

MR

RST2

POWER-ON RESET

MANUAL RESET (FOR EXAMPLE)

Figure 18. Operation of Reset Outputs

RST1 AS I/O

If

RST1 is used as a reset input to the ADM1022 while also

being used as a system reset output, it will be necessary to sepa-

rate the two functions so that a reset from the system to the

ADM1022 does not also reset the system.

This can be achieved using the circuit of Figure 19. If

ALT_RST

is high, then reset outputs from the ADM1022 can pass through

N2 to reset the system.

If, however,

ALT_RST is low, the ADM1022 will be reset, but

SYS_RST will be held high by the high input from N1 to N2.

ADM1022

RST1

100k

N1

N2

SYS_RST

ALT_RST

Figure 19. Separation of

RST1 Input from RST1 Output