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OR3LP26B Datasheet(PDF) 148 Page - Agere Systems

Part # OR3LP26B
Description  Field-Programmable System Chip (FPSC) Embedded Master/Target PCI Interface
PDF  184 Pages
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Manufacturer  AGERE [Agere Systems]
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OR3LP26B Datasheet(HTML) 148 Page - Agere Systems

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ORCA OR3LP26B FPSC
Data Sheet
Embedded Master/Target PCI Interface
March 2000
148
Lucent Technologies Inc.
Lucent Technologies Inc.
Input/Output Buffer Measurement Conditions
Note: Switch to VDD for TPLZ/TPZL; switch to GND for TPHZ/TPZH.
Figure 57. ac Test Loads
Figure 58. Output Buffer Delays
Figure 59. Input Buffer Delays
5-3234(F)
50 pF
A. Load Used to Measure Propagation Delay
TO THE OUTPUT UNDER TEST
TO THE OUTPUT UNDER TEST
50 pF
VCC
GND
1 k
Ω
B. Load Used to Measure Rising/Falling Edges
5-3233.a(F)
VDD
TPHH
VDD/2
VSS
out[i]
PAD
OUT
1.5 V
0.0 V
TPLL
PAD
out[i]
ac TEST LOADS (SHOWN ABOVE)
ts[i]
OUT
5-3235(F)
0.0 V
1.5 V
TPHH
TPLL
PAD
in[i]
IN
3.0 V
VSS
VDD/2
VDD
PAD IN
in[i]



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