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PIC18F23K22 Datasheet(PDF) 22 Page - Microchip Technology |
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PIC18F23K22 Datasheet(HTML) 22 Page - Microchip Technology |
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22 / 42 page ![]() PIC18(L)F2XK22/4XK22 DS41398B-page 22 Advance Information 2010 Microchip Technology Inc. 3.4 ID Location Programming The ID locations are programmed much like the code memory. The ID registers are mapped in addresses 200000h through 200007h. These locations read out normally even after code protection. Table 3-8 demonstrates the code sequence required to write the ID locations. In order to modify the ID locations, refer to the methodology described in Section 3.2.1 “Modifying Code Memory”. As with code memory, the ID locations must be erased before being modified. When VDD is below the minimum for Bulk Erase operation, ID locations can be cleared with the Row Erase method described in Section 3.1.3 “ICSP Row Erase”. TABLE 3-8: WRITE ID SEQUENCE Note: The user only needs to fill the first 8 bytes of the write buffer in order to write the ID locations. 4-bit Command Data Payload Core Instruction Step 1: Direct access to code memory. 0000 0000 0000 8E A6 9C A6 84 A6 BSF EECON1, EEPGD BCF EECON1, CFGS BSF EECON1, WREN Step 2: Set Table Pointer to ID. Load write buffer with 8 bytes and write. 0000 0000 0000 0000 0000 0000 1101 1101 1101 1111 0000 0E 20 6E F8 0E 00 6E F7 0E 00 6E F6 <MSB><LSB> <MSB><LSB> <MSB><LSB> <MSB><LSB> 00 00 MOVLW 20h MOVWF TBLPTRU MOVLW 00h MOVWF TBLPTRH MOVLW 00h MOVWF TBLPTRL Write 2 bytes and post-increment address by 2. Write 2 bytes and post-increment address by 2. Write 2 bytes and post-increment address by 2. Write 2 bytes and start programming. NOP - hold PGC high for time P9 and low for time P10. |
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