AD7829BN datasheet(16/28 Pages) AD

16 / 28 page

AD7822/AD7825/AD7829

Rev. C | Page 16 of 28

Mode 2 Operation (Automatic Power-Down)

When the AD7822/AD7825/AD7829 are operated in Mode 2

(see Figure 25), they automatically power down at the end of

a conversion. The CONVST signal is brought low to initiate

a conversion and is left logic low until after the EOC goes high,

that is, approximately 100 ns after the end of the conversion.

The state of the CONVST signal is sampled at this point (that is,

530 ns maximum after CONVST falling edge), and the AD7822/

AD7825/AD7829 power down as long as CONVST is low.

The ADC is powered up again on the rising edge of the

CONVST signal. Superior power performance can be achieved

in this mode of operation by powering up the AD7822/AD7825/

AD7829 only to carry out a conversion. The parallel interface of

the AD7822/AD7825/AD7829 remains fully operational while

the ADCs are powered down. A read may occur while the part

is powered down, and, therefore, it does not necessarily need to

be placed within the EOC pulse, as shown in Figure 25.

VALID

DATA

CONVST

EOC

DB0 TO DB7

TRACK

HOLD

TRACK

HOLD

120ns

Figure 24. Mode 1 Operation

CONVST

EOC

DB0 TO DB7

tPOWER-UP

VALID

DATA

POWER

DOWN

HERE

Figure 25. Mode 2 Operation

AD7829BN Datasheet(PDF) 16 Page - Analog Devices