HT56R656 datasheet(21/145 Pages) HOLTEK

21 / 145 page

Rev. 1.30

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Rev. 1.30

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HT56R62/HT56R65

HT56R642/HT56R644/HT56R654/HT56R656

TinyPowerTM A/D Type with LCD 8-Bit OTP MCU

HT56R62/HT56R65

HT56R642/HT56R644/HT56R654/HT56R656

TinyPowerTM A/D Type with LCD 8-Bit OTP MCU

System Architecture

Akeyfactorinthehigh-performancefeaturesoftheHoltekrangeofmicrocontrollersisattributed

totheirinternalsystemarchitecture.Therangeofdevicestakeadvantageoftheusualfeaturesfound

withinRISCmicrocontrollersprovidingincreasedspeedofoperationandenhancedperformance.

Thepipeliningschemeisimplementedinsuchawaythatinstructionfetchingandinstruction

executionareoverlapped,henceinstructionsareeffectivelyexecutedinonecycle,withthe

exceptionofbranchorcallinstructions.An8-bitwideALUisusedinpracticallyallinstructionset

operations,whichcarriesoutarithmeticoperations,logicoperations,rotation,increment,decrement,

branchdecisions,etc.TheinternaldatapathissimplifiedbymovingdatathroughtheAccumulator

andtheALU.CertaininternalregistersareimplementedintheDataMemoryandcanbedirectly

orindirectlyaddressed.Thesimpleaddressingmethodsoftheseregistersalongwithadditional

architecturalfeaturesensurethataminimumofexternalcomponentsisrequiredtoprovidea

functionalI/OandA/Dcontrolsystemwithmaximumreliabilityandflexibility.Thismakesthe

devicesuitableforlow-cost,high-volumeproductionforcontrollerapplications.

Clocking and Pipelining

Themainsystemclock,derivedfromeitheraCrystal/ResonatororRCoscillatorissubdividedinto

fourinternallygeneratednon-overlappingclocks,T1~T4.TheProgramCounterisincrementedat

thebeginningoftheT1clockduringwhichtimeanewinstructionisfetched.TheremainingT2~T4

clockscarryoutthedecodingandexecutionfunctions.Inthisway,oneT1~T4clockcycleforms

oneinstructioncycle.Althoughthefetchingandexecutionofinstructionstakesplaceinconsecutive

instructioncycles,thepipeliningstructureofthemicrocontrollerensuresthatinstructionsare

effectivelyexecutedinoneinstructioncycle.Theexceptiontothisareinstructionswherethe

contentsoftheProgramCounterarechanged,suchassubroutinecallsorjumps,inwhichcasethe

instructionwilltakeonemoreinstructioncycletoexecute.

WhentheRCoscillatorisused,OSC2isfreeforuseasaT1phaseclocksynchronizingpin.ThisT1

phaseclockhasafrequencyoff

SYS

/4witha1:3high/lowdutycycle.

Fe tc h In st . ( PC )

Ex ec ut e In st . (P C- 1)

Fe tc h In st . (P C+ 1)

Ex ec ut e In st . (P C)

Fe tc h In st . (P C+ 2)

Ex ec ut e In st . (P C+ 1)

PC +1

PC +2

O sci ll at or C lo ck

(S yst em C lo ck)

P has e Cl o ck T 1

Pr og ra m C oun te r

P has e Cl o ck T 2

P has e Cl o ck T 3

P has e Cl o ck T 4

Pi pe lin in g

System Clocking and Pipelining

HT56R656 Datasheet(PDF) 21 Page - Holtek Semiconductor Inc

HT56R656 Datasheet(HTML) 21 Page - Holtek Semiconductor Inc

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