HT85F2270 datasheet(180/226 Pages) HOLTEK

180 / 226 page

Rev. 1.00

180 of ��6

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Standard 8051 8-Bit Flash MCU

HT85F2260/HT85F2270/HT85F2280

I2CSTA Register

SFR Address: DDh

Bit

Name

IICS7

IICS6

IICS�

IICS4

IICS�

—

R/W

—

POR

—

Bit 7~3

IICS7~IICS3: I2C Status Code

These Read-only bits are used to indicate the I2C Status code. Refer to the I2C Status

Code section for details. The contents of the I2CSTA register is only defined when the

SI bit is set high.

Bit 2~0

Unimplemented, read as “0”

I2CDAT Register

SFR Address: DAh

Bit

Name

D�

R/W

POR

Note: The I�CDAT register is used as the I�C transmitted or received data register.

I2CADR Register

SFR Address: DBh

Bit

Name

IICA6

IICA�

IICA4

IICA�

IICA1

IICA0

R/W

POR

Bit 7~1

IICA6~IICA0: I2C slave address

IICA6~IICA0 is the I2C slave address bit 6~bit 0.

When a master device, which is connected to the I2C bus, sends out an address, which

matches the slave address in the I2CADR register, the slave device will be selected.

Bit 0

GC: General Call Address Acknowledge control bit

0: General Call Address is ignored

1: General Call Address is recognised

This bit is used to enable the General Call Address (00H) recognition function.

The I2CADR register contains the slave address for the I2C interface. In the Slave mode, the

IICA6~IICA0 bits represent a 7-bit slave address. The GC bit is used to enable the recognition

of the general call address (0x00). If the GC bit is set to “1”, the general call address recognition

function will be enabled. Otherwise, the general call address will be ignored. In the master mode,

the contents of this I2CADR register will be ignored.

HT85F2270 Datasheet(PDF) 180 Page - Holtek Semiconductor Inc

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