SCL

P

S

S

P

SDA

LM5056, LM5056A

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SNVS827A – OCTOBER 2012 – REVISED APRIL 2013

Figure 19. SMBus Timing Diagram

Table 43. SMBus Timing Definition

LIMITS

SYMBOL

PARAMETER

UNITS

MIN

MAX

SMBus operating frequency

10

400

kHz

Bus free time between stop and start condition

1.3

Hold time after (repeated) start condition. After this period, the first clock is

0.6

generated.

μs

Repeated start condition setup time

0.6

Stop condition setup time

0.6

Data hold time

85

ns

Data setup time

100

25

35

ms

Clock low period

1.5

μs

0.6

25

ms

10

20

300

ns

20

300

(1)

Devices participating in a transfer will timeout when any clock low exceeds the value of TTIMEOUT,MIN of 25 ms. Devices that have

detected a timeout condition must reset the communication no later than TTIMEOUT,MAX of 35 ms. The maximum value must be

adhered to by both a master and a slave as it incorporates the cumulative stretch limit for both a master (10 ms) and a slave (25 ms).

(2)

THIGH MAX provides a simple method for devices to detect bus idle conditions.

(3)

a slave exceeds this time, it is expected to release both its clock and data lines and reset itself.

(4)

start-to-ack, ackto- ack, or ack-to-stop.

(5)

Rise and fall time is defined as follows:

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