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LM5056 Datasheet(PDF) 11 Page - Texas Instruments

Part # LM5056
Description  High-Voltage System Power Management Device with PMBus?
PDF  46 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

LM5056 Datasheet(HTML) 11 Page - Texas Instruments

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LM5056, LM5056A
www.ti.com
SNVS827A – OCTOBER 2012 – REVISED APRIL 2013
FUNCTIONAL DESCRIPTION
The LM5056/LM5056A provides intelligent monitoring of the input voltage, output voltage, input current, input
power, temperature, and an auxiliary input. The LM5056/LM5056A also provides a peak capture of the input
power and programmable hardware averaging of the input voltage, current, power, temperature, and output
voltage. Warning thresholds which trigger the SMBA pin may be programmed for input voltage, current, power,
output voltage, and temperature via the PMBus interface.
Powering The LM5056/LM5056A
The LM5056/LM5056A is enabled by increasing the input voltage on VIN above the POREN threshold voltage,
typically 8.7 V. There exists a VDD power on reset (VDDPOR) threshold on VDD of 3.8 V. The VDDPOR threshold
must be surpassed to ensure proper telemetry readings. VDD must be powered externally by a 5 V power supply
with an allowable tolerance of ±10%.The SMBus address of the LM5056/LM5056A is captured based on the
states of the ADR0, ADR1, and ADR2 pins (GND, NC, VDD) during turn on and is latched into a volatile register
once VDD has exceeded its POR threshold of 3.8 V. Reassigning or postponing the address capture is
accomplished by holding the VREF pin to AGND. Pulling the VREF pin low also resets the logic and erases the
volatile memory of the LM5056/LM5056A. Once released, the VREF pin charges up to its final value and the
address is latched into a volatile register when the voltage at the VREF exceeds 2.55 V.
VDD
As mentioned in the previous paragraph, the LM5056/LM5056A VDD pin must be externally powered by a 5.0 V,
±10% supply. The required current is typically 6.1 mA. The pull-up voltage for the CL, ADR2, ADR1 and ADR0
pins should be the same as the voltage applied to VDD if they are to be tied high. It may also be used as the
pull-up supply for the SMBus signals (SDAI/O, SCL, SMBA). It is recommended to connect a ceramic bypass
capacitance having a value of 1
μF or greater as close to the VDD pin as the PCB layout allows.
Remote Temperature Sensing
The LM5056/LM5056A is designed to measure temperature remotely using an MMBT3904 NPN transistor. The
base and collector of the MMBT3904 should be connected to the DIODE pin and the emitter to the
LM5056/LM5056A AGND. Place the MMBT3904 near the device that requires temperature sensing. The
temperature is measured by means of a change in the diode voltage in response to a step in current supplied by
the DIODE pin. The DIODE pin sources a constant 9.4 µA but pulses 250 µA once every millisecond in order to
measure the diode temperature. Care must be taken in the PCB layout to keep the parasitic resistance between
the DIODE pin and the MMBT3904 low as to not degrade the measurement. Additionally, a small 1 nF bypass
capacitor should be placed in parallel with the MMBT3904 to reduce the effects of noise. The temperature can be
read using the READ_TEMPERATURE_1 PMBus command (8Dh). The default limits of the LM5056/LM5056A
causes SMBA pin to be pulled low if the measured temperature exceeds 150°C. These thresholds can be
reprogrammed via the PMBus interface using the OT_WARN_LIMIT (51h) and OT_FAULT_LIMIT (4Fh)
commands. If the temperature measurement and protection capability of the LM5056/LM5056A are not used, the
DIODE pin should be connected to the ground plane.
Erroneous temperature measurements may result when the device input voltage is below the minimum operating
voltage (10 V), due to VREF dropping out below the nominal voltage (2.97 V).
Copyright © 2012–2013, Texas Instruments Incorporated
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Product Folder Links: LM5056 LM5056A



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