LM5056 datasheet(12/46 Pages) TI

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RS= I

SDAI

SCL

SMBA

VREF

DIODE

ADR0

ADR1

ADR2

VDD

DGND

AGND

VAUX

VIN

VIN_K

SENSE

SMBus

Interface

MMBT3904

LOAD

LM5056/

LM5056A

+48V

CVDD

VIN

VOUT

CVREF

SDAO

OUT

5.0V

CVIN

LM5056, LM5056A

SNVS827A – OCTOBER 2012 – REVISED APRIL 2013

www.ti.com

APPLICATION INFORMATION

DESIGN-IN PROCEDURE

Refer to Figure 13 for the Typical Application Circuit diagram. The following is the step-by-step procedure for

hardware design of the LM5056/LM5056A. This procedure refers to section numbers that provide detailed

information on the following design steps. The recommended design-in procedure is as follows:

Figure 13. Typical Application Circuit

CURRENT Range (Selecting RS)

The LM5056/LM5056A monitors the input current by measuring the voltage across the sense resistor (RS),

connected from VIN_K to SENSE. The required resistor value is calculated from:

where

•

IFS is the expected full scale current and VS is the current sense voltage range based on the current select

range setting (CL).

(1)

If the voltage across RS reaches VS, the current measurement reaches the full-scale measurement. As

mentioned before, it is important to limit the current to the full-scale reading. While there is internal circuitry

intended to maintain the integrity of the other readings in the telemetry, the ADC and MUX are shared so

overranging an input may compromise the integrity of the other readings.

VS can be set to either 27.0 mV or 54.4 mV through software commands or the CL pin. This setting defaults to

the sense voltage set at the CL pin during start-up. The value can be set via the PMBus with the

DEVICE_SETUP (D9h) command, which defaults to the 27.0 mV setting. Once the full scale current, IFS is known

and the VS range is chosen, the sense resistor can be calculated. The maximum load current in normal operation

can be used to determine the required power rating for the sense resistor RS.

Connections from RS to the LM5056/LM5056A should be made using Kelvin techniques. In the suggested layout

of Figure 14 the small pads at the lower corners of the sense resistor connect only to the sense resistor

terminals, and not to the traces carrying the high current. With this technique, only the voltage across the sense

resistor is applied to VIN_K and SENSE, eliminating the voltage drop across the high-current solder connections.

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