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AM3359 Datasheet(PDF) 90 Page - Texas Instruments |
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AM3359 Datasheet(HTML) 90 Page - Texas Instruments |
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90 / 236 page ![]() AM3359, AM3358, AM3357 AM3356, AM3354, AM3352 SPRS717F – OCTOBER 2011 – REVISED APRIL 2013 www.ti.com 3.3 DC Electrical Characteristics Table 3-13 summarizes the dc electrical characteristics. Note: The interfaces or signals described in Table 3-13 correspond to the interfaces or signals available in multiplexing mode 0. All interfaces or signals multiplexed on the terminals described in Table 3-13 have the same dc electrical characteristics. Table 3-13. DC Electrical Characteristics Over Recommended Ranges of Supply Voltage and Operating Temperature (Unless Otherwise Noted) PARAMETER MIN NOM MAX UNIT DDR_RESETn,DDR_CSn0,DDR_CKE,DDR_CK,DDR_CKn,DDR_CASn,DDR_RASn,DDR_WEn,DDR_BA0,DDR_BA1,DDR_BA2,DDR_A 0,DDR_A1,DDR_A2,DDR_A3,DDR_A4,DDR_A5,DDR_A6,DDR_A7,DDR_A8,DDR_A9,DDR_A10,DDR_A11,DDR_A12,DDR_A13,DDR_A 14,DDR_A15,DDR_ODT,DDR_D0,DDR_D1,DDR_D2,DDR_D3,DDR_D4,DDR_D5,DDR_D6,DDR_D7,DDR_D8,DDR_D9,DDR_D10,DDR_ D11,DDR_D12,DDR_D13,DDR_D14,DDR_D15,DDR_DQM0,DDR_DQM1,DDR_DQS0,DDR_DQSn0,DDR_DQS1,DDR_DQSn1 pins (mDDR - LVCMOS mode) 0.65 * VIH High-level input voltage V VDDS_DDR 0.35 * VIL Low-level input voltage V VDDS_DDR VHYS Hysteresis voltage at an input 0.07 0.25 V High level output voltage, driver enabled, pullup VDDS_DDR - VOH IOH = 8 mA V or pulldown disbaled 0.4 Low level output voltage, driver enabled, pullup VOL IOL = 8 mA 0.4 V or pulldown disbaled Input leakage current, Receiver disabled, pullup or pulldown 10 inhibited II µA Input leakage current, Receiver disabled, pullup enabled -240 -80 Input leakage current, Receiver disabled, pulldown enabled 80 240 Total leakage current through the terminal connection of a driver- IOZ receiver combination that may include a pullup or pulldown. The 10 µA driver output is disabled and the pullup or pulldown is inhibited. DDR_RESETn,DDR_CSn0,DDR_CKE,DDR_CK,DDR_CKn,DDR_CASn,DDR_RASn,DDR_WEn,DDR_BA0,DDR_BA1,DDR_BA2,DDR_A 0,DDR_A1,DDR_A2,DDR_A3,DDR_A4,DDR_A5,DDR_A6,DDR_A7,DDR_A8,DDR_A9,DDR_A10,DDR_A11,DDR_A12,DDR_A13,DDR_A 14,DDR_A15,DDR_ODT,DDR_D0,DDR_D1,DDR_D2,DDR_D3,DDR_D4,DDR_D5,DDR_D6,DDR_D7,DDR_D8,DDR_D9,DDR_D10,DDR_ D11,DDR_D12,DDR_D13,DDR_D14,DDR_D15,DDR_DQM0,DDR_DQM1,DDR_DQS0,DDR_DQSn0,DDR_DQS1,DDR_DQSn1 pins (DDR2 - SSTL mode) VIH High-level input voltage DDR_VREF + V 0.125 VIL Low-level input voltage DDR_VREF - V 0.125 VHYS Hysteresis voltage at an input NA V VOH High-level output voltage, driver enabled, pullup IOH = 8 mA VDDS_DDR - V or pulldown disbaled 0.4 VOL Low-level output voltage, driver enabled, pullup IOL = 8 mA 0.4 V or pulldown disbaled Input leakage current, Receiver disabled, pullup or pulldown 10 inhibited II µA Input leakage current, Receiver disabled, pullup enabled -240 -80 Input leakage current, Receiver disabled, pulldown enabled 80 240 IOZ Total leakage current through the terminal connection of a driver- 10 µA receiver combination that may include a pullup or pulldown. The driver output is disabled and the pullup or pulldown is inhibited. 90 Device Operating Conditions Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: AM3359 AM3358 AM3357 AM3356 AM3354 AM3352 |
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