AD7854ARS datasheet(5/28 Pages) AD

5 / 28 page

AD7854/AD7854L

REV. B

–5–

ORDERING GUIDE

Linearity

Power

Temperature

Error

Dissipation

Package

Model

Range

(LSB)

(mW)

Option

AD7854AQ

–40

°C to +85°C

Q-28

AD7854SQ

–55

°C to +125°C

Q-28

AD7854AR

–40

°C to +85°C

R-28

AD7854BR

–40

°C to +85°C

1/2

R-28

AD7854ARS

–40

°C to +85°C

RS-28

AD7854LAQ

–40

°C to +85°C

5.5

Q-28

AD7854LAR

–40

°C to +85°C

5.5

R-28

AD7854LARS

–40

°C to +85°C

5.5

RS-28

EVAL-AD7854CB

EVAL-CONTROL BOARD

NOTES

1Linearity error refers to the integral linearity error.

2Q = Cerdip; R = SOIC; RS = SSOP.

3L signifies the low power version.

4This can be used as a stand-alone evaluation board or in conjunction with the EVAL-CONTROL BOARD for

evaluation/demonstration purposes.

5This board is a complete unit allowing a PC to control and communicate with all Analog Devices evaluation boards

ending in the CB designator. For more information on Analog Devices products and evaluation boards visit our

World Wide Web home page at http://www.analog.com.

OUTPUT

+2.1V

IOH

1.6mA

200µA

IOL

50pF

Figure 1. Load Circuit for Digital Output Timing

Specifications

ABSOLUTE MAXIMUM RATINGS

(TA = +25

°C unless otherwise noted)

AVDD to AGND . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V

DVDD to DGND . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V

AVDD to DVDD . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +0.3 V

Analog Input Voltage to AGND . . . . –0.3 V to AVDD + 0.3 V

Digital Input Voltage to DGND . . . . –0.3 V to DVDD + 0.3 V

Digital Output Voltage to DGND . . . –0.3 V to DVDD + 0.3 V

REFIN/REFOUT to AGND . . . . . . . . . –0.3 V to AVDD + 0.3 V

Input Current to Any Pin Except Supplies

2 . . . . . . . . .

±10 mA

Operating Temperature Range

Commercial (A, B Versions) . . . . . . . . . . . –40

°C to +85°C

Commercial (S Version) . . . . . . . . . . . . . . –55

°C to +125°C

Storage Temperature Range . . . . . . . . . . . –65

°C to +150°C

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150

°C

Cerdip Package, Power Dissipation . . . . . . . . . . . . . . 450 mW

JA Thermal Impedance

. . . . . . . . . . . . . . . . . . . . . . 75

°C/W

Lead Temperature, (Soldering, 10 secs) . . . . . . . . . +300

°C

SOIC, SSOP Package, Power Dissipation . . . . . . . . . 450 mW

JA Thermal Impedance . . . 75

°C/W (SOIC) 115°C/W (SSOP)

θJC Thermal Impedance . . . 25°C/W (SOIC) 35°C/W (SSOP)

Lead Temperature, Soldering

Vapor Phase (60 secs) . . . . . . . . . . . . . . . . . . . . . . +215

°C

Infrared (15 secs) . . . . . . . . . . . . . . . . . . . . . . . . . +220

°C

NOTES

1Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. This is a stress rating only; functional operation of the

device at these or any other conditions above those listed in the operational

sections of this specification is not implied. Exposure to absolute maximum rating

conditions for extended periods may affect device reliability.

2Transient currents of up to 100 mA will not cause SCR latchup.

PIN CONFIGURATION

FOR DIP, SOIC AND SSOP

TOP VIEW

(Not to Scale)

AD7854

CONVST

DB10

DB11

CLKIN

BUSY

DVDD

DGND

DB9

REFIN/REFOUT

AVDD

AGND

CREF1

CREF2

AIN(+)

DB6

DB7

DB8

AIN(–)

HBEN

DB0

DB1

DB5

DB2

DB3

DB4

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