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AD7091 Datasheet(PDF) 13 Page - Analog Devices

Part # AD7091
Description  1 MSPS, Ultralow Power, 12-Bit ADC in 8-Lead LFCSP
PDF  20 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD7091 Datasheet(HTML) 13 Page - Analog Devices

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Data Sheet
AD7091
Rev. A | Page 13 of 20
To exit power-down mode and power up the AD7091, pull
CONVST high at any time. On the rising edge of CONVST, the
device begins to power up. The power-up time of the AD7091
is 100 µs. To start the next conversion, operate the interface as
described in the Normal Mode section.
POWER CONSUMPTION
The two modes of operation for the AD7091—normal mode
and power-down mode (see the Modes of Operation section for
more information)—produce different power vs. throughput
rate performances. Using a combination of normal mode and
power-down mode achieves the optimum power performance.
To achieve optimum static current consumption, SCLK should
be in burst mode and CS should idle high. Failure to adhere to
these guidelines results in increased static current.
Improved power consumption for the AD7091 can also be
achieved by carefully selecting the VDD supply (see Figure 13).
Power Consumption in Normal Mode
With a 3 V VDD supply and a throughput rate of 1 MSPS, the IDD
current consumption for the part in normal operational mode is
367 μA (composed of 9.1 μA of static current and 357.9 μA of
dynamic current during conversion). The dynamic current con-
sumption is directly proportional to the throughput rate.
The following example calculates the power consumption of
the AD7091 when operating in normal mode with a 500 kSPS
throughput rate and a 3 V supply.
The dynamic conversion time contributes 537 μW to the overall
power dissipation as follows:
((500 kSPS/1 MSPS) × 357.9 μA) × 3 V = 537 μW
The contribution to the total power dissipated by the normal
mode static operation is
9.1 μA × 3 V = 27 μW
Therefore, the total power dissipated at 500 kSPS is
537 μW + 27 μW = 564 μW
Power Consumption Using a Combination of Normal
Mode and Power-Down Mode
A combination of normal mode and power-down mode
achieves the optimum power performance. This operation
can be performed at constant sampling rates of <10 kSPS.
Figure 22 shows the AD7091 conversion sequence using a
combination of normal mode and power-down mode with a
throughput of 5 kSPS. With a VDD supply voltage of 3 V, the
static current is 9.1 μA. The dynamic current is 357.9 μA at
1 MSPS. The current consumption during power-down mode
is 324 nA. A conversion takes typically 650 ns to complete, and
the AD7091 takes 100 μs to power up from power-down mode.
The dynamic conversion time contributes 5 μW to the overall
power dissipation as follows:
((5 kSPS/1 MSPS) × 357.9 μA) × 3 V = 5 μW
The contribution to the total power dissipated by the normal
mode static operation and the power-down mode is
(((100 μs + 650 ns)/200 μs) × 9.1 μA) × 3 V +
((99.4 μs/200 μs) × 324 nA) × 3 V = 14 μW
Therefore, the total power dissipated at 5 kSPS is
5 μW + 14 μW = 19 μW
99
μs
POWER-DOWN
100
μs
POWER-UP
650ns
CONVERSION
200
μs
CONVST
EOC
CS
SDO
DATA
NOTES
1. EOC IS THE END OF A CONVERSION.
Figure 22. Conversion Sequence with Normal Mode and Power-Down Mode, 5 kSPS Throughput



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