AD822 datasheet(55/88 Pages) AD

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ADuC841/ADuC842/ADuC843

Rev. 0 | Page 55 of 88

Table 24. TIMECON SFR Bit Designations

Bit No.

Name

Description

----

Reserved.

TFH

Twenty-Four Hour Select Bit.

Set by the user to enable the hour counter to count from 0 to 23.

Cleared by the user to enable the hour counter to count from 0 to 255.

ITS1

Interval Timebase Selection Bits.

ITS0

Written by user to determine the interval counter update rate.

ITS1

ITS0

Interval Timebase

1/128 Second

Seconds

Minutes

Hours

STI

Single Time Interval Bit.

Set by the user to generate a single interval timeout. If set, a timeout clears the TIEN bit.

Cleared by the user to allow the interval counter to be automatically reloaded and start counting again at each

interval timeout.

TII

TIC Interrupt Bit.

Set when the 8-bit interval counter matches the value in the INTVAL SFR.

Cleared by user software.

TIEN

Time Interval Enable Bit.

Set by the user to enable the 8-bit time interval counter.

Cleared by the user to disable the interval counter.

TCEN

Time Clock Enable Bit.

Set by the user to enable the time clock to the time interval counters.

Cleared by the user to disable the clock to the time interval counters and reset the time interval SFRs to the last

value written to them by the user. The time registers (HTHSEC, SEC, MIN, and HOUR) can be written while TCEN

is low.

TIMECON

TIC Control Register

SFR Address

A1H

Power-On Default

00H

Bit Addressable

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