AD822 datasheet(34/88 Pages) AD

34 / 88 page

ADuC841/ADuC842/ADuC843

Rev. 0 | Page 34 of 88

USING FLASH/EE DATA MEMORY

The 4 kBytes of Flash/EE data memory are configured as 1024

pages, each of 4 bytes. As with the other ADuC841/ADuC842/

ADuC843 peripherals, the interface to this memory space is via

a group of registers mapped in the SFR space. A group of four

data registers (EDATA1–4) is used to hold the four bytes of data

at each page. The page is addressed via the two registers, EADRH

and EADRL. Finally, ECON is an 8-bit control register that may

be written with one of nine Flash/EE memory access commands

to trigger various read, write, erase, and verify functions. A block

diagram of the SFR interface to the Flash/EE data memory array

is shown in Figure 41.

ECON—Flash/EE Memory Control SFR

Programming of either Flash/EE data memory or Flash/ EE

program memory is done through the Flash/EE memory

control SFR (ECON). This SFR allows the user to read, write,

erase, or verify the 4 kBytes of Flash/EE data memory or the

56 kBytes of Flash/EE program memory.

BYTE 1

(0000H)

BYTE 1

(0004H)

BYTE 1

(0008H)

BYTE 1

(000CH)

BYTE 1

(0FF8H)

BYTE 1

(0FFCH)

BYTE 2

(0001H)

BYTE 2

(0005H)

BYTE 2

(0009H)

BYTE 2

(000DH)

BYTE 2

(0FF9H)

BYTE 2

(0FFDH)

BYTE 3

(0002H)

BYTE 3

(0006H)

BYTE 3

(000AH)

BYTE 3

(000EH)

BYTE 3

(0FFAH)

BYTE 3

(0FFEH)

BYTE 4

(0003H)

BYTE 4

(0007H)

BYTE 4

(000BH)

BYTE 4

(000FH)

BYTE 4

(0FFBH)

(0FFFH)

01H

00H

02H

03H

3FEH

3FFH

BYTE

ADDRESSES

ARE GIVEN IN

BRACKETS

BYTE 4

Figure 41. Flash/EE Data Memory Control and Configuration

Table 12. ECON—Flash/EE Memory Commands

ECON VALUE

Command Description (Normal Mode)

(Power-On Default)

Command Description (ULOAD Mode)

01H

READ

Results in 4 bytes in the Flash/EE data memory, addressed

by the page address EADRH/L, being read into EDATA1–4.

Not implemented. Use the MOVC instruction.

02H

WRITE

Results in 4 bytes in EDATA1–4 being written to the

Flash/EE data memory at the page address given by

EADRH/L (0 – EADRH/L < 0400H).

Note that the 4 bytes in the page being addressed must

be pre-erased.

Results in bytes 0–255 of internal XRAM being written to

the 256 bytes of Flash/EE program memory at the page

address given by EADRH (0 – EADRH < E0H).

Note that the 256 bytes in the page being addressed must

be pre-erased.

03H

Reserved.

04H

VERIFY

Verifies that the data in EDATA1–4 is contained in the

page address given by EADRH/L. A subsequent read of the

ECON SFR results in 0 being read if the verification is valid,

or a nonzero value being read to indicate an invalid

verification.

Not implemented. Use the MOVC and MOVX instructions

to verify the write in software.

05H

ERASE PAGE

Results in erasing the 4-byte page of Flash/EE data

memory addressed by the page address EADRH/L.

Results in the 64 byte page of Flash/EE program memory,

addressed by the byte address EADRH/L, being erased.

EADRL can equal any of 64 locations within the page. A

new page starts whenever EADRL is equal to 00H, 40H,

80H, or C0H.

06H

ERASE ALL

Results in erasing the entire 4 kBytes of Flash/EE data

memory.

Results in erasing the entire 56 kBytes of ULOAD Flash/EE

program memory.

81H

READBYTE

Results in the byte in the Flash/EE data memory,

addressed by the byte address EADRH/L, being read into

EDATA1 (0 – EADRH / L – 0FFFH).

Not implemented. Use the MOVC command.

82H

WRITEBYTE

Results in the byte in EDATA1 being written into Flash/EE

data memory at the byte address EADRH/L

Results in the byte in EDATA1 being written into Flash/EE

program memory at the byte address EADRH/L (0 –

EADRH/L – DFFFH).

0FH

EXULOAD

Leaves the ECON instructions to operate on the Flash/EE

data memory.

Enters normal mode directing subsequent ECON

instructions to operate on the Flash/EE data memory.

F0H

ULOAD

Enters ULOAD mode, directing subsequent ECON

instructions to operate on the Flash/EE program memory.

Leaves the ECON instructions to operate on the Flash/EE

program memory.

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