AD822 datasheet(70/88 Pages) AD

70 / 88 page

ADuC841/ADuC842/ADuC843

Rev. 0 | Page 70 of 88

INTERRUPT SYSTEM

The ADuC841/ADuC842/ADuC843 provide a total of nine

interrupt sources with two priority levels. The control and

configuration of the interrupt system is carried out through

three interrupt-related SFRs:

Interrupt Enable Register

Interrupt Priority Register

IEIP2

Secondary Interrupt Enable Register

Interrupt Enable Register

SFR Address

A8H

Power-On Default

00H

Bit Addressable

Yes

Table 35. IE SFR Bit Designations

Bit No.

Name

Description

Set by the user to enable, or cleared to disable all interrupt sources.

EADC

Set by the user to enable, or cleared to disable ADC interrupts.

ET2

Set by the user to enable, or cleared to disable Timer 2 interrupts.

Set by the user to enable, or cleared to disable UART serial port interrupts.

ET1

Set by the user to enable, or cleared to disable 0 Timer 1 interrupts.

EX1

Set by the user to enable, or cleared to disable External Interrupt 1.

ET0

Set by the user to enable, or cleared to disable Timer 0 interrupts.

EX0

Set by the user to enable, or cleared to disable External Interrupt 0 .

Interrupt Priority Register

SFR Address

B8H

Power-On Default

00H

Bit Addressable

Yes

Table 36. IP SFR Bit Designations

Bit No.

Name

Description

----

Reserved.

PADC

Written by the user to select the ADC interrupt priority (1 = High; 0 = Low).

PT2

Written by the user to select the Timer 2 interrupt priority (1 = High; 0 = Low).

Written by the user to select the UART serial port interrupt priority (1 = High; 0 = Low).

PT1

Written by the user to select the Timer 1 interrupt priority (1 = High; 0 = Low).

PX1

Written by the user to select External Interrupt 1 priority (1 = High; 0 = Low).

PT0

Written by the user to select the Timer 0 interrupt priority (1 = High; 0 = Low).

PX0

Written by the user to select External Interrupt 0 priority (1 = High; 0 = Low).

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