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EP3SE110 Datasheet(PDF) 235 Page - Altera Corporation |
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EP3SE110 Datasheet(HTML) 235 Page - Altera Corporation |
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235 / 341 page  Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics 1–225 I/O Timing © July 2010 Altera Corporation Stratix III Device Handbook, Volume 2 Table 1–108 lists the EP3SE50 row pins output timing parameters for differential I/O standards. Table 1–108. EP3SE50 Row Pins Output Timing Parameters (Part 1 of 3) I/O Standard Clock Fast Model C2 C3 C4 C4L I3 I4 I4L Units Industrial Commercial V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 0.9 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 0.9 V LVDS — GCLK t co 2.674 2.849 3.990 4.359 4.834 4.699 4.910 4.467 4.945 4.809 4.961 ns GCLK PLL t co 3.068 3.295 4.657 5.068 5.588 5.445 5.648 5.200 5.724 5.579 5.715 ns LVDS_E_1R — GCLK t co 3.050 3.285 4.695 5.114 5.642 5.499 5.702 5.251 5.785 5.640 5.776 ns GCLK PLL t co 2.674 2.849 3.990 4.359 4.834 4.699 4.910 4.467 4.945 4.809 4.961 ns LVDS_E_3R — GCLK t co 3.068 3.295 4.657 5.068 5.588 5.445 5.648 5.200 5.724 5.579 5.715 ns GCLK PLL t co 3.050 3.285 4.695 5.114 5.642 5.499 5.702 5.251 5.785 5.640 5.776 ns MINI-LVDS — GCLK t co 2.674 2.849 3.990 4.359 4.834 4.699 4.910 4.467 4.945 4.809 4.961 ns GCLK PLL t co 3.068 3.295 4.657 5.068 5.588 5.445 5.648 5.200 5.724 5.579 5.715 ns MINI- LVDS_E_1R — GCLK t co 3.050 3.285 4.695 5.114 5.642 5.499 5.702 5.251 5.785 5.640 5.776 ns GCLK PLL tco 3.104 3.338 4.741 5.158 5.685 5.542 5.745 5.294 5.824 5.679 5.815 ns MINI- LVDS_E_3R — GCLK t co 3.090 3.324 4.728 5.145 5.672 5.529 5.732 5.280 5.811 5.666 5.802 ns GCLK PLL t co 3.086 3.320 4.726 5.145 5.673 5.530 5.733 5.280 5.813 5.668 5.804 ns RSDS — GCLK t co 3.102 3.335 4.727 5.142 5.667 5.524 5.727 5.277 5.806 5.661 5.797 ns GCLK PLL t co 3.091 3.325 4.723 5.138 5.664 5.521 5.724 5.274 5.803 5.658 5.794 ns RSDS_E_1R — GCLK t co 3.088 3.322 4.721 5.136 5.662 5.519 5.722 5.272 5.802 5.657 5.793 ns GCLK PLL t co 3.099 3.332 4.722 5.137 5.661 5.518 5.721 5.271 5.800 5.655 5.791 ns RSDS_E_3R — GCLK t co 3.089 3.323 4.720 5.135 5.660 5.517 5.720 5.271 5.800 5.655 5.791 ns GCLK PLL t co 3.075 3.309 4.705 5.120 5.646 5.503 5.706 5.256 5.785 5.640 5.776 ns DIFFERENTIAL 1.2-V HSTL CLASS I 4mA GCLK t co 3.072 3.305 4.701 5.116 5.642 5.499 5.702 5.252 5.781 5.636 5.772 ns GCLK PLL t co 3.069 3.303 4.702 5.119 5.645 5.502 5.705 5.255 5.785 5.640 5.776 ns 6mA GCLK tco 3.070 3.303 4.692 5.107 5.632 5.489 5.692 5.242 5.771 5.626 5.762 ns GCLK PLL t co 3.119 3.356 4.763 5.180 5.708 5.565 5.768 5.316 5.847 5.702 5.838 ns 8mA GCLK t co 3.095 3.332 4.745 5.163 5.691 5.548 5.751 5.299 5.832 5.687 5.823 ns GCLK PLL t co 3.077 3.313 4.723 5.141 5.669 5.526 5.729 5.277 5.810 5.665 5.801 ns |
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