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LP55231 Datasheet(PDF) 20 Page - Texas Instruments |
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LP55231 Datasheet(HTML) 20 Page - Texas Instruments |
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20 / 53 page  LP55231 SNOSCR5 – MARCH 2013 www.ti.com Control Register Write Cycle • Master device generates start condition. • Master device sends slave address (7 bits) and the data direction bit (r/w = 0). • Slave device sends acknowledge signal if the slave address is correct • Master sends control register address (8 bits). • Slave sends acknowledge signal. • Master sends data byte to be written to the addressed register. • Slave sends acknowledge signal. • If master sends further data bytes, the slave’s control register address will be incremented by one after acknowledge signal. In order to reduce program load time, the LP55231 supports address auto incrementation. Register address is incremented after each 8 data bits. For example, the whole program memory page can be written in one serial bus write sequence. Note: serial bus address auto increment is not supported for register addresses from 16 to 1E. • Write cycle ends when the master creates stop condition. Control Register Read Cycle • Master device generates a start condition. • Master device sends slave address (7 bits) and the data direction bit (r/w = 0). • Slave device sends acknowledge signal if the slave address is correct • Master sends control register address (8 bits). • Slave sends acknowledge signal. • Master device generates repeated start condition. • Master sends the slave address (7 bits) and the data direction bit (r/w = 1). • Slave sends acknowledge signal if the slave address is correct. • Slave sends data byte from addressed register. • If the master device sends an acknowledge signal, the control register address will be incremented by one. Slave device sends data byte from addressed register. • Read cycle ends when the master does not generate acknowledge signal after data byte and generates stop condition Auto-Increment Feature The auto-increment feature allows writing several consecutive registers within one transmission. Every time an 8- bit word is sent to the LP55231, the internal address index counter will be incremented by one, and the next register will be written. Example below (Table 2) shows writing sequence to two consecutive registers. Auto- increment feature is enabled by writing EN_AUTO_INCR bit high in the MISC register (addr 36h). Note: serial bus address auto increment is not supported for register addresses from 16 to 1E. Table 2. Auto Increment Example CHIP REG MASTER START ADDR WRITE DATA DATA STOP ADDR =32H LP55231 ACK ACK ACK ACK 20 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LP55231 |
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