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LTC3548 Datasheet(PDF) 3 Page - Linear Technology |
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LTC3548 Datasheet(HTML) 3 Page - Linear Technology |
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3 / 16 page ![]() LTC3548 3 3548fc ELECTRICAL CHARACTERISTICS Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3548 is guaranteed to meet specified performance from 0°C to 85°C. Specifications over the – 40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. The LTC3548I is guaranteed to meet specified performance over the full –40°C to 85°C temperature range. Note 3: The LTC3548 is tested in a proprietary test mode that connects VFB to the output of the error amplifier. Note 4: Dynamic supply current is higher due to the internal gate charge being delivered at the switching frequency. Note 5: TJ is calculated from the ambient TA and power dissipation PD according to the following formula: TJ = TA + (PD • θJA). Note 6: The DFN switch on-resistance is guaranteed by correlation to wafer level measurements. The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V, unless otherwise specified. (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS ΔVLOADREG Output Voltage Load Regulation (Note 3) 0.5 % IS Input DC Supply Current Active Mode Sleep Mode Shutdown (Note 4) VFB1 = VFB2 = 0.5V VFB1 = VFB2 = 0.63V, MODE/SYNC = 3.6V RUN = 0V, VIN = 5.5V, MODE/SYNC = 0V 700 40 0.1 950 60 1 μA μA μA fOSC Oscillator Frequency VFB = 0.6V l 1.8 2.25 2.7 MHz fSYNC Synchronization Frequency 2.25 MHz ILIM Peak Switch Current Limit Channel 1 Peak Switch Current Limit Channel 2 VIN = 3V, VFB = 0.5V, Duty Cycle <35% VIN = 3V, VFB = 0.5V, Duty Cycle <35% 0.95 0.6 1.2 0.7 1.6 0.9 A A RDS(ON) Top Switch On-Resistance Bottom Switch On-Resistance (Note 6) (Note 6) 0.35 0.30 0.45 0.45 Ω Ω ISW(LKG) Switch Leakage Current VIN = 5V, VRUN = 0V, VFB = 0V 0.01 1 μA POR Power-On Reset Threshold VFB Ramping Down, MODE/SYNC = 0V –8.5 % Power-On Reset On-Resistance 100 200 Ω Power-On Reset Delay 262,144 Cycles VRUN RUN Threshold l 0.3 1 1.5 V IRUN RUN Leakage Current l 0.01 1 μA MODE Mode Threshold Low Mode Threshold High 0 VIN – 0.5 0.5 VIN V V TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C unless otherwise specified. Load Step Burst Mode Operation Pulse-Skipping Mode 3548 G01 VIN = 3.6V VOUT = 1.8V ILOAD = 180mA CHANNEL 1; CIRCUIT OF FIGURE 3 SW 5V/DIV VOUT 20mV/DIV IL 200mA/DIV 2μs/DIV 3548 G02 VIN = 3.6V VOUT = 1.8V ILOAD = 30mA CHANNEL 1; CIRCUIT OF FIGURE 3 SW 5V/DIV VOUT 10mV/DIV IL 200mA/DIV 1μs/DIV 3548 G03 VIN = 3.6V VOUT = 1.8V ILOAD = 80mA TO 800mA CHANNEL 1; CIRCUIT OF FIGURE 3 VOUT 200mV/DIV IL 500mA/DIV ILOAD 500mA/DIV 20μs/DIV |
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