EP3C80 datasheet(133/274 Pages) ALTERA

133 / 274 page

Chapter 7: High-Speed Differential Interfaces in the Cyclone III Device Family

7–11

High-Speed I/O Standards Support

December 2011

Altera Corporation

Cyclone III Device Handbook

Volume 1

Figure 7–6 shows a RSDS, mini-LVDS, or PPDS interface with two singled-ended

output buffers and external resistors.

A resistor network is required to attenuate the output voltage swing to meet RSDS,

mini-LVDS, and PPDS specifications when using emulated transmitters. You can

modify the resistor network values to reduce power or improve the noise margin.

The resistor values chosen must satisfy Equation 7–1.

1 Altera recommends that you perform simulations using Cyclone III device family IBIS

models to validate that custom resistor values meet the RSDS, mini-LVDS, or PPDS

requirements.

You can use a single external resistor instead of using three resistors in the resistor

network for an RSDS interface, as shown in Figure 7–7. The external single-resistor

solution reduces the external resistor count while still achieving the required

signaling level for RSDS. However, the performance of the single-resistor solution is

lower than the performance with the three-resistor network.

Figure 7–6. RSDS, Mini-LVDS, or PPDS Interface with External Resistor Network on the Top and Bottom I/O Banks (1)

Note to Figure 7–6:

(1) R

S = 120  ; RP =170 

100

Cyclone III Device Family

Resistor Network

Emulated RSDS,

Mini-LVDS, or PPDS

Transmitter

RSDS, Mini-LVDS,

or PPDS Receiver

Equation 7–1.

-------



-------

--------------------

50 

EP3C80 Datasheet(PDF) 133 Page - Altera Corporation