EP3C80 datasheet(137/274 Pages) ALTERA

137 / 274 page

Chapter 7: High-Speed Differential Interfaces in the Cyclone III Device Family

7–15

True Output Buffer Feature

December 2011

Altera Corporation

Cyclone III Device Handbook

Volume 1

Figure 7–13 shows the differential HSTL Class II interface.

True Output Buffer Feature

Cyclone III device family true differential transmitters offer programmable

pre-emphasis—you can choose to turn it on or off. The default setting is on.

Programmable Pre-Emphasis

The programmable pre-emphasis boosts the high frequencies of the output signal to

compensate the frequency-dependent attenuation of the transmission line to

maximize the data eye opening at the far-end receiver. Without pre-emphasis, the

output current is limited by the VOD specification and the output impedance of the

transmitter. At high frequency, the slew rate may not be fast enough to reach full VOD

before the next edge; this may lead to pattern dependent jitter. With pre-emphasis, the

output current is momentarily boosted during switching to increase the output slew

rate. The overshoot produced by this extra switching current is different from the

overshoot caused by signal reflection. This overshoot happens only during switching,

and does not produce ringing.

Figure 7–14 shows the differential output signal with pre-emphasis.

Figure 7–13. Differential HSTL Class II Interface

Note to Figure 7–13:

(1) PLL output clock pins do not support differential HSTL Class II I/O standard.

Output Buffer (1)

Receiver

Z0 = 50 Ω

VTT

Figure 7–14. The Output Signal with Pre-Emphasis

Positive channel (p)

Negative channel (n)

Overshoot

Undershoot

EP3C80 Datasheet(PDF) 137 Page - Altera Corporation