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EP3C80 Datasheet(PDF) 199 Page - Altera Corporation

Part # EP3C80
Description  Chapter Revision Dates
PDF  274 Pages
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Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation

EP3C80 Datasheet(HTML) 199 Page - Altera Corporation

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Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family
9–41
Configuration Features
August 2012
Altera Corporation
Cyclone III Device Handbook
Volume 1
Figure 9–18 shows PS configuration for Cyclone III device family using a download
cable.
You can use a download cable to configure multiple Cyclone III device family by
connecting the nCEO pin of each device to the nCE pin of the subsequent device. The
nCE
pin of the first device is connected to GND while its nCEO pin is connected to the
nCE
pin of the next device in the chain. The nCE input of the last device comes from the
previous device while its nCEO pin is left floating. All other configuration pins,
nCONFIG
, nSTATUS, DCLK, DATA[0], and CONF_DONE are connected to every device in the
chain. Because all CONF_DONE pins are tied together, all devices in the chain initialize
and enter user mode at the same time.
In addition, the entire chain halts configuration if any device detects an error because
the nSTATUS pins are tied together. The Auto-restart configuration after error option
does not affect the configuration cycle because you must manually restart
configuration in the Quartus II software when an error occurs.
Figure 9–18. PS Configuration Using a USB-Blaster, MasterBlaster, ByteBlaster II,
ByteBlasterMV, or Ethernet Blaster Cable
Notes to Figure 9–18:
(1) The pull-up resistor must be connected to the same supply voltage as the VCCA supply.
(2) You only need the pull-up resistors on DATA[0] and DCLK if the download cable is the only configuration scheme
used on your board. This is to ensure that DATA[0] and DCLK are not left floating after configuration. For example,
if you are also using a configuration device, you do not need the pull-up resistors on DATA[0] and DCLK.
(3) Pin 6 of the header is a VIO reference voltage for the MasterBlaster output driver. VIO must match the VCCA of the
device. For this value, refer to the MasterBlaster Serial/USB Communications Cable User Guide. For the USB Blaster,
ByteBlaster II, ByteBlaster MV, and Ethernet Blaster, this pin is a no connect.
(4) The nCEO pin is left unconnected or used as a user I/O pin when it does not feed the nCE pin of another device.
(5) The MSEL pin settings vary for different configuration voltage standards and POR time. To connect MSEL[3..0],
refer to Table 9–7 on page 9–11 for PS configuration schemes. Connect the MSEL pins directly to VCCA or GND.
(6) Power up the VCC of the ByteBlaster II, USB-Blaster, or ByteBlasterMV cable with a 2.5- V supply from VCCA.
Third-party programmers must switch to 2.5 V. Pin 4 of the header is a VCC power supply for the MasterBlaster cable.
The MasterBlaster cable can receive power from either 5.0- or 3.3-V circuit boards, DC power supply, or 5.0 V from
the USB cable. For this value, refer to the MasterBlaster Serial/USB Communications Cable User Guide.
MSEL[3..0] (5)
nCONFIG
CONF_DONE
V
CCA (1)
V
CCA (6)
Shield
GND
V
CCA (1)
GND
VCCA (1)
10k
Ω
10k
Ω
V
CCA (1)
10k
Ω
10 k
Ω
nSTATUS
Pin 1
Download Cable 10-Pin Male
Header (Top View)
GND
V
IO (3)
Cyclone III Device Family
nCEO
DCLK
DATA[0]
nCE
V
CCA (1)
N.C. (4)
(2)
(2)
10k
Ω



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