| Electronic Components Datasheet Search |
|
DM163006 Datasheet(PDF) 233 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
DM163006 Datasheet(HTML) 233 Page - Microchip Technology |
|
233 / 320 page ![]() 2001 Microchip Technology Inc. Advance Information DS39541A-page 233 PIC18C601/801 CPFSGT Compare f with WREG, skip if f > WREG Syntax: [ label ] CPFSGT f [,a] Operands: 0 ≤ f ≤ 255 a ∈ [0,1] Operation: (f) − (WREG), skip if (f) > (WREG) (unsigned comparison) Status Affected: None Encoding: 0110 010a ffff ffff Description: Compares the contents of data memory location ’f’ to the contents of the WREG by performing an unsigned subtraction. If the contents of ’f’ are greater than the contents of , then the fetched instruction is discarded and a NOP is executed instead, making this a two-cycle instruction. If ’a’ is 0, the Access Bank will be selected, over- riding the BSR value. If ’a’ is 1, the Bank will be selected as per the BSR value. Words: 1 Cycles: 1(2) Note: 3 cycles if skip and followed by a 2-word instruction. Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read register ’f’ Process Data No operation If skip: Q1 Q2 Q3 Q4 No operation No operation No operation No operation If skip and followed by 2-word instruction: Q1 Q2 Q3 Q4 No operation No operation No operation No operation No operation No operation No operation No operation Example: HERE CPFSGT REG NGREATER : GREATER : Before Instruction PC = Address (HERE) WREG = ? After Instruction If REG > WREG; PC = Address (GREATER) If REG ≤ WREG; PC = Address (NGREATER) CPFSLT Compare f with WREG, skip if f < WREG Syntax: [ label ] CPFSLT f [,a] Operands: 0 ≤ f ≤ 255 a ∈ [0,1] Operation: (f) – (WREG), skip if (f) < (WREG) (unsigned comparison) Status Affected: None Encoding: 0110 000a ffff ffff Description: Compares the contents of data memory location 'f' to the contents of WREG by performing an unsigned subtraction. If the contents of 'f' are less than the contents of WREG, then the fetched instruction is discarded and a NOP is executed instead, making this a two-cycle instruction. If ’a’ is 0, the Access Bank will be selected. If ’a’ is 1, the Bank will be selected as per the BSR value. Words: 1 Cycles: 1(2) Note: 3 cycles if skip and followed by a 2-word instruction. Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read register ’f’ Process Data No operation If skip: Q1 Q2 Q3 Q4 No operation No operation No operation No operation If skip and followed by 2-word instruction: Q1 Q2 Q3 Q4 No operation No operation No operation No operation No operation No operation No operation No operation Example: HERE CPFSLT REG NLESS : LESS : Before Instruction PC = Address (HERE) WREG = ? After Instruction If REG < WREG; PC = Address (LESS) If REG ≥ WREG; PC = Address (NLESS) |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |