DM163006 datasheet(239/320 Pages) MICROCHIP

239 / 320 page

 2001 Microchip Technology Inc.

Advance Information

DS39541A-page 239

PIC18C601/801

LFSR

Load FSR

Syntax:

[ label ]

LFSR f,k

Operands:

≤ f ≤ 2

≤ k ≤ 4095

Operation:

→ FSRf

Status Affected:

None

Encoding:

1110

1111

1110

0000

00ff

k7kkk

k11kkk

kkkk

Description:

The 12-bit literal ’k’ is loaded into

the file select register pointed to

by ’f’.

Words:

Cycles:

Q Cycle Activity:

Decode

Read literal

’k’ MSB

Process

Data

Write

literal ’k’ MSB

to FSRfH

Decode

Read literal

’k’ LSB

Process

Data

Write literal’k’

to FSRfL

Example:

LFSR FSR2, 3ABh

After Instruction

FSR2H

03h

FSR2L

0ABh

MOVF

Move f

Syntax:

[ label ]

MOVF f [,d [,a]]

Operands:

≤ f ≤ 255

∈ [0,1]

Operation:

→ dest

Status Affected:

N,Z

Encoding:

0101

00da

ffff

Description:

The contents of register ’f’ is moved

to a destination dependent upon the

status of ’d’. If 'd' is 0, the result is

placed in WREG. If 'd' is 1, the result

is placed back in register 'f' (default).

Location 'f' can be anywhere in the

256 byte Bank. If ’a’ is 0, the Access

Bank will be selected, overriding the

BSR value. If ’a’ is 1, the Bank will

be selected as per the BSR value.

Words:

Cycles:

Q Cycle Activity:

Decode

Read

Process

Data

Write

WREG

Example:

MOVF

REG, W

Before Instruction

REG

22h

WREG

0FFh

After Instruction

REG

22h

WREG

22h

DM163006 Datasheet(PDF) 239 Page - Microchip Technology

DM163006 Datasheet(HTML) 239 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL