DM163006 datasheet(110/320 Pages) MICROCHIP

110 / 320 page

PIC18C601/801

DS39541A-page 110

Advance Information

 2001 Microchip Technology Inc.

9.4

PORTD, TRISD and LATD

Registers

PORTD is an 8-bit wide, bi-directional port. The corre-

sponding data direction register is TRISD. Setting a

TRISD bit (= 1) will make the corresponding PORTD

pin an input (i.e., put the corresponding output driver in

a Hi-Impedance mode). Clearing a TRISD bit (= 0) will

make the corresponding PORTD pin an output (i.e., put

the contents of the output latch on the selected pin).

Read-modify-write operations on the LATD register

reads and writes the latched output value for PORTD.

PORTD is an 8-bit port with Schmitt Trigger input buff-

ers. Each pin is individually configurable as an input or

output.

PORTD is multiplexed with the system bus and is avail-

able only when the system bus is disabled, by setting

EBIDS bit in register MEMCON. When operating as

the system bus, PORTD is the low order byte of the

address/data bus (AD7:AD0), or as the low order

address byte (A15:A8) if the address and data buses

are de-multiplexed.

EXAMPLE 9-4:

INITIALIZING PORTD

FIGURE 9-7:

PORTD BLOCK DIAGRAM

IN I/O MODE

Note:

On a Power-on Reset, PORTD defaults to

the system bus.

CLRF

PORTD

; Initialize PORTD by

; clearing output

; data latches

CLRF

LATD

; Alternate method

; to clear output

; data latches

MOVLW

0CFh

; Value used to

; initialize data

; direction

MOVWF

TRISD

; Set RD3:RD0 as inputs

; RD5:RD4 as outputs

; RD7:RD6 as inputs

Data Bus

WR LATD

WR TRISD

RD PORTD

Data Latch

TRIS Latch

RD TRISD

Schmitt

Trigger

Input

Buffer

I/O pin

RD LATD

WR PORTD

Note:

I/O pins have diode protection to VDD and VSS.

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