TUSB6250 datasheet(8/125 Pages) TI1

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Controller Description

1−1

SLLS535E − April 2008

TUSB6250

Controller Description

The TUSB6250 is a USB 2.0 HS-capable function controller with an integrated UTMI compliant PHY. The

TUSB6250 is intended as a USB 2.0 to ATA/ATAPI bridge for storage devices using a standard ATA or ATAPI

interface.

The TUSB6250 is designed to use both the fast performance of the state machine and the programmability

and flexibility of the embedded microcontroller and firmware. With the elaborative balance between the

microcontroller unit (MCU) and the state machine, in addition to its embedded fast MCU (up to 30 MIPS), eight

configurable endpoints, up to 40K bytes of configurable code, and data buffer SRAM, the TUSB6250 provides

a bridge solution to meet both the performance and flexibility requirement of the next-generation external

storage devices. With a low-power-consumption USB 2.0 integrated PHY, the TUSB6250 also enables the

true USB 2.0 high-speed bus-powered application.

1.1

Acronyms and Terms

This section lists and defines some terms and abbreviations used throughout this data manual.

R/O

Read-only. Implies a certain register bit is read-only.

W/O

Write-only. Implies a certain register bit is write-only. The read operation to this bit normally returns

a zero value.

R/W

Read/write. Implies a certain register bit can be accessed with both write and read operations.

R/C

Read/set-clear. Implies a certain register bit can be read and cleared to its reset default value by

the MCU writing a certain value to it. The write-to-clear value may vary and depends on the

condition defined in a particular register.

W/C

Write/clear. Implies a register bit can be written to perform certain clear functions defined in a

particular register. The bit value being written to remains active for one clock cycle. It is cleared

thereafter automatically. The read operation to this bit always returns a zero value.

MCU

Microcontroller unit. In this data manual, MCU refers to the microcontroller embedded in the

TUSB6250.

EDB

Endpoint descriptor block. This is a set of registers used to define the characteristics of an endpoint

of a USB device.

UBM

USB buffer manager. This is a major functional block of the TUSB6250.

SPRAM

Single-port RAM

Little-endian

For data with multiple bytes, little-endian means that the byte order is organized such that byte 0

is the least significant byte. The bit order within each individual byte is always the same regardless

of which endianness is used; that is, bit 7 is always the most-significant bit.

Big-endian

For data with multiple bytes, big-endian means that the byte order is organized such that byte 0

is the most significant byte. The bit order within each individual byte is always the same regardless

of which endianness is used; that is, bit 7 is always the most-significant bit.

TUSB6250 Datasheet(PDF) 8 Page - Texas Instruments

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