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AT90USB646 Datasheet(PDF) 165 Page - ATMEL Corporation |
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AT90USB646 Datasheet(HTML) 165 Page - ATMEL Corporation |
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165 / 456 page ![]() 165 7593L–AVR–09/12 AT90USB64/128 The clock source for Timer/Counter2 is named clk T2S. clkT2S is by default connected to the main system I/O clock clk IO. By setting the AS2 bit in ASSR, Timer/Counter2 is asynchronously clocked from the TOSC1 pin. This enables use of Timer/Counter2 as a Real Time Counter (RTC). When AS2 is set, pins TOSC1 and TOSC2 are disconnected from Port C. A crystal can then be connected between the TOSC1 and TOSC2 pins to serve as an independent clock source for Timer/Counter2. The Oscillator is optimized for use with a 32.768kHz crystal. Apply- ing an external clock source to TOSC1 is not recommended. For Timer/Counter2, the possible prescaled selections are: clk T2S/8, clkT2S/32, clkT2S/64, clk T2S/128, clkT2S/256, and clkT2S/1024. Additionally, clkT2S as well as 0 (stop) may be selected. Setting the PSRASY bit in GTCCR resets the prescaler. This allows the user to operate with a predictable prescaler. 16.10.1 GTCCR – General Timer/Counter Control Register • Bit 1 – PSRASY: Prescaler Reset Timer/Counter2 When this bit is one, the Timer/Counter2 prescaler will be reset. This bit is normally cleared immediately by hardware. If the bit is written when Timer/Counter2 is operating in asynchronous mode, the bit will remain one until the prescaler has been reset. The bit will not be cleared by hardware if the TSM bit is set. Refer to the description of the Section “GTCCR – General Timer/Counter Control Register” on page 97 for a description of the Timer/Counter Synchroniza- tion mode. Bit 7 6 5 4 3 2 1 0 TSM – – – – –PSRA- SY PSRSY NC GTCCR Read/write R/W R R R R R R/W R/W Initial value 0 0 0 0 0 0 0 0 |
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