PCF8536AT datasheet(11/74 Pages) NXP

11 / 74 page

PCF8536

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Product data sheet

Rev. 2 — 21 February 2012

11 of 74

NXP Semiconductors

PCF8536

Universal LCD low multiplex driver with 6 channel PWM generator

With the following sequence, the PCF8536 can be set to a state of minimum power

consumption, called power-down mode.

Remarks:

• It is necessary to run the power-down sequence before removing the supplies.

Depending on the application, care must be taken that no other signals are present at

the chip input or output pins when removing the supplies (see Section 10). Otherwise

it may cause unwanted display artifacts. In case of an uncontrolled removal of supply

voltages, the PCF8536 will not be damaged.

• Static voltages across the liquid crystal display can build up when the external LCD

supply voltage (VLCD) is on while the IC supply voltage is off, or vice versa. This may

cause unwanted display artifacts. To avoid such artifacts, VLCD and VDD must be

applied or removed together.

Table 9.

Effect of the power-down bit (PD)

Effect on function

Mode settings

Effect of setting PD

backplane output

E = 1

normal function

VSS

segment output

E = 1

normal function

VSS

internal oscillator

OSC = 0, COE = 1

off

OSCCLK pin

OSC = 0, COE = 1

output of internal

oscillator frequency

VDD

OSCCLK pin

OSC = 1

input clock

clock input, can be

logic 0, logic 1, or left

floating

GPO

static drive

GPO

PWM drive

static drive

Fig 6.

Recommended power-down sequence

START

Disable display

by setting bit E

logic 0

External clock

can be

removed now

013aaa447

Enable power-

down mode

with PD = 1

STOP

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