AD9887APCB datasheet(16/52 Pages) AD

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AD9887A

Rev. B | Page 16 of 52

PIN FUNCTION DETAILS—DIGITAL INTERFACE

Digital Video Data Inputs

Rx0+

Digital Differential Input Channel 0 True

Rx0−

Digital Differential Input Channel 0 Complement

Rx1+

Digital Differential Input Channel 1 True

Rx1−

Digital Differential Input Channel 1 Complement

Rx2+

Digital Differential Input Channel 2 True

Rx2−

Digital Differential Input Channel 2 Complement

These pins receive three pairs of differential, low

voltage, swing input pixel data from a digital

graphics transmitter.

Digital Video Clock Inputs

RxC+

Digital Differential Data Clock True

RxC−

Digital Differential Data Clock Complement

These pins receive the differential, low voltage,

swing input pixel clock from a digital graphics

transmitter.

Termination Control

RTERM

Internal Termination Set Pin

This pin is used to set the termination resistance for

all digital interface high speed inputs. To set this pin,

place a resistor of 10 times the desired input termi-

nation resistance between this pin (Pin 53) and the

ground supply. Typically, the value of this resistor

should be 500 Ω.

Data Enable

This pin outputs the state of data enable (DE). The

AD9887A decodes DE from the incoming stream of

data. The DE signal is high during active video and

low when there is no active video.

HDCP

DDCSCL HDCP Slave Serial Port Data Clock

For use in communicating with the HDCP-enabled

DVI transmitter.

DDCSDA HDCP Slave Serial Port Data I/O

For use in communicating with the HDCP-enabled

DVI transmitter.

MCL

HDCP Master Serial Port Data Clock

Connects the EEPROM for reading the encrypted

HDCP keys.

MDA

HDCP Master Serial Port Data I/O

Connects the EEPROM for reading the encrypted

HDCP keys.

CTL

Digital Control Outputs

These pins output the control signals for the red and

green channels. CTL0 and CTL1 correspond to the

red channel input, and CTL2 and CTL3 correspond

to the green channel input.

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