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LSM6DB0TR Datasheet(PDF) 62 Page - STMicroelectronics |
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LSM6DB0TR Datasheet(HTML) 62 Page - STMicroelectronics |
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62 / 66 page ![]() Register description LSM6DB0 62/66 DocID025603 Rev 1 Figure 19. Wait bit enabled • Wait bit = ‘1’ Interrupt disabled after duration sample (sort of hysteresis) Rate (dps) Rate Threshold 0 t(n) t(n) t(n) Interrupt Counter Duration Value “Wait” Enabled Duration value is the same used to validate interrupt |
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