ADV7282 datasheet(13/32 Pages) AD

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Data Sheet

ADV7282

Rev. A | Page 13 of 32

THEORY OF OPERATION

The ADV7282/ADV7282-M are versatile one-chip, multiformat

video decoders. The ADV7282/ADV7282-M automatically

detect standard analog baseband video signals compatible with

worldwide NTSC, PAL, and SECAM standards in the form of

composite, S-Video, and component video.

The ADV7282 converts the analog video signals into an 8-bit

YCrCb 4:2:2 video data stream that is compatible with the 8-bit

ITU-R BT.656 interface standard.

The ADV7282-M converts the analog video signals into an 8-bit

YCrCb 4:2:2 video data stream that is output over a MIPI CSI-2

interface.

The MIPI CSI-2 output interface connects to a wide range of

video processors and FPGAs. The accurate 10-bit analog-to-digital

conversion provides professional quality video performance for

consumer applications with true 8-bit data resolution.

The analog video inputs of the ADV7282/ADV7282-M accept

single-ended, pseudo differential, and fully differential composite

video signals, as well as S-Video and YPrPb video signals,

supporting a wide range of consumer and automotive video

sources.

In differential CVBS mode, the ADV7282/ADV7282-M, along

with an external resistor divider, provides a common-mode

input range of up to 4 V, enabling the removal of large signal,

common-mode transients present on the video lines.

The advanced interlaced-to-progressive (I2P) function allows

the ADV7282/ADV7282-M to convert an interlaced video

input into a progressive video output. This function is per-

formed without the need for external memory. The ADV7282/

ADV7282-M uses edge adaptive technology to minimize video

defects on low angle lines.

The automatic gain control (AGC) and clamp restore circuitry

allows an input video signal peak-to-peak range of 0 V to 1.0 V

at the analog video input pins of the ADV7282/ADV7282-M.

Alternatively, the AGC and clamp restore circuitry can be

bypassed for manual settings.

AC coupling of the input video signals provides short-to-battery

(STB) protection. STB diagnostics can be performed on two

input video signals.

The ADV7282/ADV7282-M support a number of other functions,

including 8-bit to 6-bit down dither mode and adaptive contrast

enhancement (ACE).

The ADV7282/ADV7282-M are programmed via a 2-wire, serial

bidirectional port (I2C compatible) and is fabricated in a 1.8 V

CMOS process. The monolithic CMOS construction of the

ADV7282/ADV7282-M ensures greater functionality with

lower power dissipation. The LFCSP package option makes the

decoder ideal for space-constrained portable applications.

ANALOG FRONT END (AFE)

The analog front end (AFE) of the ADV7282/ADV7282-M

comprises a single high speed, 10-bit ADC that digitizes the

analog video signal before applying it to the standard definition

processor (SDP). The AFE uses differential channels to the

ADC to ensure high performance in mixed-signal applications

and to enable differential CVBS inputs to be connected directly

to the ADV7282/ADV7282-M.

The AFE also includes an input mux that enables multiple video

signals to be applied to the ADV7282/ADV7282-M. The input

mux allows up to four composite video signals to be applied to the

ADV7282 and up to six composite video signals to be applied to

the ADV7282-M.

Current clamps are positioned in front of the ADC to ensure

that the video signal remains within the range of the converter.

A resistor divider network is required before each analog input

channel to ensure that the input signal is kept within the range

of the ADC (see the Input Networks section). Fine clamping of

the video signal is performed downstream by digital fine clamp-

ing within the ADV7282/ADV7282-M.

Table 11 lists the three ADC clock rates that are determined by

the video input format to be processed. These clock rates ensure

4× oversampling per channel for CVBS, Y/C, and YPrPb modes.

Table 11. ADC Clock Rates

Input Format

ADC Clock Rate (MHz)1

Oversampling

Rate per Channel

CVBS

57.27

4×

Y/C (S-Video)

114

4×

YPrPb

172

4×

Based on a 28.63636 MHz crystal between the XTALP and XTALN pins.

The fully differential AFE of the ADV7282/ADV7282-M

provides inherent small and large signal noise rejection,

improved electromagnetic interference (EMI) protection,

and the ability to absorb ground bounce. Support is provided

for both true differential and pseudo differential signals.

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