ADV7282 datasheet(27/32 Pages) AD

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Data Sheet

ADV7282

Rev. A | Page 27 of 32

PCB LAYOUT RECOMMENDATIONS

The ADV7282/ADV7282-M is a high precision, high speed,

mixed-signal device. To achieve maximum performance from

the part, it is important to use a well-designed PCB. This

section provides guidelines for designing a PCB for use with

the ADV7282/ADV7282-M.

ANALOG INTERFACE INPUTS

When routing the analog interface inputs on the PCB, keep

track lengths to a minimum. Use 75 Ω trace impedances when

possible; trace impedances other than 75 Ω increase the chance

of reflections.

POWER SUPPLY DECOUPLING

It is recommended that each power supply pin be decoupled with

100 nF and 10 nF capacitors. The basic principle is to place a

decoupling capacitor within approximately 0.5 cm of each power

pin. Avoid placing the decoupling capacitors on the opposite side

of the PCB from the ADV7282/ADV7282-M because doing so

introduces inductive vias in the path.

Place the decoupling capacitors between the power plane and

the power pin. Current should flow from the power plane to the

capacitor and then to the power pin. Do not apply the power

connection between the capacitor and the power pin. The best

approach is to place a via near, or beneath, the decoupling capaci-

tor pads down to the power plane (see Figure 17).

SUPPLY

GROUND

10nF

100nF

VIA TO SUPPLY

VIA TO GND

Figure 17. Recommended Power Supply Decoupling

It is especially important to maintain low noise and good

stability for the PVDD pin. Careful attention must be paid to

regulation, filtering, and decoupling. It is highly desirable to

provide separate regulated supplies for each circuit group

(AVDD, DVDD, DVDDIO, MVDD, and PVDD). Note that MVDD only

applies to the ADV7282-M model.

Some graphic controllers use substantially different levels of

power when active (during active picture time) and when idle

(during horizontal and vertical sync periods). This disparity can

result in a measurable change in the voltage supplied to the analog

supply regulator, which can, in turn, produce changes in the regu-

lated analog supply voltage. This problem can be mitigated by

regulating the analog supply, or at least the PVDD supply, from a

different, cleaner power source, for example, from a 12 V supply.

Using a single ground plane for the entire board is also recom-

mended. Experience has shown that the noise performance is

the same or better with a single ground plane. Using multiple

ground planes can be detrimental because each separate ground

plane is smaller, and long ground loops can result.

VREFN AND VREFP PINS

Place the circuit associated with the VREFN and VREFP pins

as close as possible to the ADV7282/ADV7282-M and on the

same side of the PCB as the part.

DIGITAL OUTPUTS

The ADV7282 digital outputs are: INTRQ, LLC, P0:P7. The

ADV7282-M digital outputs are: INTRQ, GPO0 to GPO2.

Minimize the trace length that the digital outputs must drive.

Longer traces have higher capacitance, requiring more current

and, in turn, causing more internal digital noise. Shorter traces

reduce the possibility of reflections.

Adding a 30 Ω to 50 Ω series resistor can suppress reflections,

reduce EMI, and reduce current spikes inside the ADV7282/

ADV7282-M. If series resistors are used, place them as close as

possible to the pins of the ADV7282/ADV7282-M. However, try

not to add vias or extra length to the output trace in an attempt

to place the resistors closer.

If possible, limit the capacitance that each digital output must drive

to less than 15 pF. This recommendation can be easily accom-

modated by keeping traces short and by connecting the outputs to

only one device. Loading the outputs with excessive capacitance

increases the current transients inside the ADV7282/ADV7282-M,

creating more digital noise on the power supplies.

EXPOSED METAL PAD

The ADV7282/ADV7282-M has an exposed metal pad on the

bottom of the package. This pad must be soldered to ground.

The exposed pad is used for proper heat dissipation, noise

suppression, and mechanical strength.

DIGITAL INPUTS

The digital inputs of the ADV7282/ADV7282-M are designed to

work with 1.8 V signals (3.3 V for DVDDIO) and are not tolerant of

5 V signals. Extra components are required if 5 V logic signals

must be applied to the decoder.

MIPI OUTPUTS (D0P, D0N, CLKP, CLKN)

ADV7282-M ONLY

It is recommended that the MIPI output traces be kept as short

as possible and on the same side of the PCB as the ADV7282-M

device. It is also recommended that a solid plane (preferably a

ground plane) be placed on the layer adjacent to the MIPI traces

to provide a solid reference plane.

MIPI transmission operates in both differential and single-

ended modes. During high speed transmission, the pair of

outputs operates in differential mode; in low power mode, the

pair operates as two independent single-ended traces. There-

fore, it is recommended that each output pair be routed as two

loosely coupled 50 Ω single-ended traces to reduce the risk of

crosstalk between the two traces in low power mode.

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