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ADV7282 Datasheet(PDF) 17 Page - Analog Devices |
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ADV7282 Datasheet(HTML) 17 Page - Analog Devices |
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17 / 32 page ![]() Data Sheet ADV7282 Rev. A | Page 17 of 32 INPUT CONFIGURATION The input format of the ADV7282/ADV7282-M is specified using the INSEL[4:0] bits (see Table 12). These bits also configure the SDP core to process CVBS, differential CVBS, Y/C (S-Video), or component (YPrPb) format. The INSEL[4:0] bits are located in the user sub map of the register space at Address 0x00[4:0]. For more information about the registers, see the Register Maps section. The INSEL[4:0] bits specify predefined analog input routing schemes, eliminating the need for manual mux programming and allowing the user to route the various video signal types to the decoder. For example, if the CVBS input is selected, the remaining channels are powered down. Table 12. Input Format Specified by the INSEL[4:0] Bits INSEL[4:0] Bit Value Video Format Analog Inputs ADV7282 ADV7282-M 00000 CVBS CVBS input on AIN1 CVBS input on AIN1 00001 CVBS CVBS input on AIN2 CVBS input on AIN2 00010 CVBS Reserved CVBS input on AIN3 00011 CVBS Reserved CVBS input on AIN4 00100 Reserved Reserved Reserved 00101 Reserved Reserved Reserved 00110 CVBS CVBS input on AIN3 CVBS input on AIN5 00111 CVBS CVBS input on AIN4 CVBS input on AIN6 01000 Y/C (S-Video) Y input on AIN1; C input on AIN2 Y input on AIN1; C input on AIN2 01001 Y/C (S-Video) Reserved Y input on AIN3; C input on AIN4 01010 Reserved Reserved Reserved 01011 Y/C (S-Video) Y input on AIN3; C input on AIN4 Y input on AIN5; C input on AIN6 01100 YPrPb Reserved1 Y input on AIN1; Pb input on AIN2; Pr input on AIN3 01101 Reserved Reserved Reserved 01110 Differential CVBS Positive input on AIN1; Negative input on AIN2 Positive input on AIN1; Negative input on AIN2 01111 Differential CVBS Reserved Positive input on AIN3; Negative input on AIN4 10000 Reserved Reserved Reserved 10001 Differential CVBS Positive input on AIN3; Negative input on AIN4 Positive input on AIN5; Negative input on AIN6 10010 to 11111 Reserved Reserved Reserved 1 Note that it is possible for the ADV7282 to receive YPbPr formats; however, a manual muxing scheme is required. In this case luma(Y) is fed in on AIN1 or AIN3, blue chroma (Pb) is fed in on AIN4, and red chroma (Pr) is fed in on AIN2. |
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