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TAS5706APAP Datasheet(PDF) 14 Page - Texas Instruments |
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TAS5706APAP Datasheet(HTML) 14 Page - Texas Instruments |
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14 / 71 page ![]() RESET TIMING (RESET) t w(RESET) Earliesttime thathardmute couldbeexited RESET VALID t d(VALID_LOW) t d(I2C_ready) Startsystem t d(run) Systeminitialization. EnableviaI C. 2 T0029-05 POWER-DOWN (PDN) TIMING PDN VALID t d(STARTUP) t d(VALID_LOW) T0030-04 t w TAS5706A TAS5706B SLOS606D – MARCH 2009 – REVISED SEPTEMBER 2009............................................................................................................................................. www.ti.com Control signal parameters over recommended operating conditions (unless otherwise noted) PARAMETER MIN TYP MAX UNIT td(VALID_LOW) Time to assert VALID (reset to power stage) low 300 ns tw(RESET) Pulse duration, RESET active 1 ms td(I2C_ready) Time to enable I2C 3.5 ms td(run) Device start-up time (after start-up command via I2C) 10 ms NOTE: On power up, it is recommended that the TAS5706A/B RESET be held LOW for at least 100 µs after DVDD has reached 3.0 V. RESET assertion is ignored if applied while part is powered down Figure 4. Reset Timing Control signal parameters over recommended operating conditions (unless otherwise noted) PARAMETER MIN TYP MAX UNIT td(VALID_LOW) Time to assert VALID (reset to power stage) low 725 µs td(STARTUP) Device startup time 120 ms tw Minimum pulse duration required 800 ns NOTE: PDNZ assertion is ignored if applied when part is in RESET Figure 5. Power-Down Timing 14 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TAS5706A TAS5706B TAS5706A is Not Recommended for New Designs |
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