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DMVA3 Datasheet(PDF) 112 Page - Texas Instruments |
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DMVA3 Datasheet(HTML) 112 Page - Texas Instruments |
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112 / 287 page  DMVA3, DMVA4 SPRS872B – MAY 2013 – REVISED DECEMBER 2013 www.ti.com Table 4-2. XIP (on GPMC) Boot Options CONTROLLED I/O FUNCTION DURING XIP (NOR) BOOT BTMODE[10] = 0 [OPTION A] BTMODE[10] = 1 [OPTION B] SIGNAL NAME PIN NO. OTHER CONDITIONS PULL PULL PIN FUNCTION PIN FUNCTION STATE STATE GPMC_CS[0]/* AC9 GPMC_CS[0] IPU GPMC_CS[0] IPU AA10 BTMODE[14:13] = 01b or 10b (Mux) GPMC_ADV_ALE IPU GPMC_ADV_ALE IPU GPMC_ADV_ALE/* BTMODE[14:13] = 00b (Non-Mux) Default GPMC_OE_RE Y8 GPMC_OE_RE IPU GPMC_OE_RE IPU GPMC_BE[0]_CLE/GPMC_A[25]/* Y3 GPMC_BE[0]_CLE IPD Default IPD GPMC_BE[1]/GPMC_A[24]/* Y11 Default IPD Default IPD GPMC_WE Y5 GPMC_WE IPU GPMC_WE IPU W8 BTMODE[15] = 1b (WAIT Used/Enabled) GPMC_WAIT[0] IPU GPMC_WAIT[0] IPU GPMC_WAIT[0]/GPMC_A[26]/* BTMODE[15] = 0b (WAIT Not Default IPD(1) Used/Disabled) GPMC_CLK/* AB9 GPMC_CLK IPU Default IPU P2, R1, R2, R3, R4, R6, T8, T1, GPMC_D[15:0] Off GPMC_D[15:0] Off GPMC_D[15:0]/* T2, T3, T5, W9, U2, W3, W4, W6 AK3 BTMODE[12] = 0b (8-bit Mode) GPMC_A[0] IPD GPMC_A[0] IPD */GPMC_A[27]/GPMC_A[26]/GPMC_A[0]/* BTMODE[12] = 1b (16-bit Mode) Default AK4, AJ4, AL5, AK5, AJ6, AL6, XIP_MUX0 Mode GPMC_A[1:12] IPD GPMC_A[1:12] IPD */GPMC_A[1:12]/* AK6, AJ7, AK7, AE4, AK8, AJ8 XIP_MUX1 Mode Default IPD Default IPD AD1, AC8, AC5, AC4, A2, B2, XIP_MUX0 Mode Default Default Default Default */GPMC_A[1:12]/* (M1) C1, C2, D5, H9, J10, B3 XIP_MUX1 Mode GPMC_A[1:12] Default GPMC_A[1:12] Default */GPMC_A[13:15]/* (M0) AH8, AG8, AF8 Default IPD Default IPD M8 BTMODE[12] = 0b (8-bit Mode) Default IPU Default IPU */GPMC_A[0]/* (M1) BTMODE[12] = 1b (16-bit Mode) L2 BTMODE[14:13] = 01b or 10b (Mux) Default IPU Default IPU */GPMC_A[13]/* (M1) BTMODE[14:13] = 00b (Non-Mux) IPD(1) L4 BTMODE[14:13] = 01b or 10b (Mux) Default IPU Default IPU */GPMC_A[14]/* (M1) BTMODE[14:13] = 00b (Non-Mux) IPD(1) */GPMC_A[15]/* (M1) L6 Default IPD Default IPD GPMC_A[16:19]/* M1, M2, M3, M5 Default IPD Default IPD GPMC_A[20] (M0) N9 Default IPU Default IPD(1) GPMC_A[21] (M0) N1 Default IPD Default IPD GPMC_A[22] (M0) N2 Default IPU Default IPD(1) GPMC_A[23] (M0) R8 Default IPD Default IPD (1) After initial power-up the internal pullup (IPU) will be at its default configuration of IPU. During the boot ROM execution, the pull state is reconfigured to IPD and it remains IPD after boot until the user software reconfigures it. 112 Device Configurations Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: DMVA3 |
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