APA300 datasheet(46/178 Pages) ACTEL

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ProASICPLUS Flash Family FPGAs

2- 36

v5.9

Table 2-23 • DC Electrical Specifications (VDDP = 3.3 V ±0.3 V and VDD = 2.5 V ±0.2 V)

Applies to Commercial and Industrial Temperature Only

Symbol

Parameter

Conditions

Commercial/Industrial1

Units

Min.

Typ.

Max.

VOH

Output High Voltage

3.3 V I/O, High Drive (OB33P)

3.3 V I/O, Low Drive (OB33L)

IOH = –14 mA

IOH = –24 mA

IOH = –6 mA

IOH = –12 mA

0.9

∗V

DDP

2.4

0.9

∗V

DDP

2.4

VOL

Output Low Voltage

3.3 V I/O, High Drive (OB33P)

3.3 V I/O, Low Drive (OB33L)

IOL = 15 mA

IOL = 20 mA

IOL = 28 mA

IOL = 7 mA

IOL = 10 mA

IOL = 15 mA

0.1VDDP

0.4

0.7

0.1VDDP

0.4

0.7

VIH

Input High Voltage

3.3 V Schmitt Trigger Inputs

3.3 V LVTTL/LVCMOS

2.5 V Mode

1.6

1.7

VDDP + 0.3

VIL

Input Low Voltage

3.3 V Schmitt Trigger Inputs

3.3 V LVTTL/LVCMOS

2.5 V Mode

–0.3

0.8

0.7

RWEAKPULLUP Weak

Pull-up

Resistance

(IOB33U)

VIN ≥ 1.5 V

RWEAKPULLUP Weak

Pull-up

Resistance

(IOB25U)

VIN ≥ 1.5 V

IIN

Input Current

with pull up (VIN = GND)

–300

–40

µA

without pull up (VIN = GND or VDD)

–10

µA

IDDQ

Quiescent Supply Current

(standby)

Commercial

VIN = GND

4 or V

Std.

5.0

IDDQ

Quiescent Supply Current

(standby)

Industrial

VIN = GND

4 or V

Std.

5.0

IDDQ

Quiescent Supply Current

(standby)

Military

VIN = GND

4 or V

Std.

5.0

Notes:

1. All process conditions. Commercial/Industrial: Junction Temperature: –40 to +110°C.

2. During transitions, the input signal may overshoot to VDDP +1.0 V for a limited time of no larger than 10% of the duty cycle.

3. During transitions, the input signal may undershoot to –1.0 V for a limited time of no larger than 10% of the duty cycle.

4. No pull-up resistor required.

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