APA300 datasheet(62/178 Pages) ACTEL

62 / 178 page

ProASICPLUS Flash Family FPGAs

2- 52

v5.9

Table 2-48 • Recommended Operating Conditions

Parameter

Symbol

Limits

Commercial/Industrial

Military/MIL-STD-883

Maximum Clock Frequency*

fCLOCK

180 MHz

Maximum RAM Frequency*

fRAM

150 MHz

Maximum Rise/Fall Time on Inputs*

•

Schmitt Trigger Mode (10% to 90%)

•

Non-Schmitt Trigger Mode (10% to

90%)

tR/tF

N/A

100 ns

10 ns

Maximum LVPECL Frequency*

180 MHz

Maximum TCK Frequency (JTAG)

fTCK

10 MHz

Table 2-49 • Slew Rates Measured at C = 30pF, Nominal Power Supplies and 25°C

Type

Trig. Level

Rising Edge (ns)

Slew Rate (V/ns)

Falling Edge (ns)

Slew Rate (V/ns)

PCI Mode

OB33PH

10%-90%

1.60

1.65

1.60

Yes

OB33PN

10%-90%

1.57

1.68

3.32

0.80

OB33PL

10%-90%

1.57

1.68

1.99

1.32

OB33LH

10%-90%

3.80

0.70

4.84

0.55

OB33LN

10%-90%

4.19

0.63

3.37

0.78

OB33LL

10%-90%

5.49

0.48

2.98

0.89

OB25LPHH

10%-90%

1.55

1.29

1.56

1.28

OB25LPHN

10%-90%

1.70

1.18

2.08

0.96

OB25LPHL

10%-90%

1.97

1.02

2.09

0.96

OB25LPLH

10%-90%

3.57

0.56

3.93

0.51

OB25LPLN

10%-90%

4.65

0.43

3.28

0.61

OB25LPLL

10%-90%

5.52

0.36

3.44

0.58

APA300 Datasheet(PDF) 62 Page - Actel Corporation

APA300 Datasheet(HTML) 62 Page - Actel Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL