A6

A5

A0

D7

D1

D0

D7

D0

D7

D1

D0

0

Data Byte 0

CSX

(host)

SCL

(host)

SDA

(host)

Data Byte 1

Data Byte n

(256 maximum)

A6

A5

A4

A3

A2

A1

A0

1

D7

D6

D5

D4

D3

D2

D1

D0

CSX

(host)

SCL

(host)

SDA

(host)

SDA

(device)

A6

A5

A4

A3

A2

A1

A0

D7

D6

D5

D4

D3

D2

D1

D0

0

CSX

(host)

SCL

(host)

SDA

(host)

LM2512A

www.ti.com

SNLS269B – AUGUST 2007 – REVISED MAY 2013

SPI Timing

Figure 15. 16-bit SPI WRITE

Figure 16. 16-bit SPI READ

Figure 17. SPI PAGE WRITE

Power Up Sequence

The MPL Link must be powered up and enabled in a certain sequence for proper operation of the link and

devices. The following list provides the recommended sequence:

1. Apply Power (See Power Supply Section)

2. PD* Input should be held low until Power is stable and within specification and PCLK is driven to a static

level.

3. PD* is driven HIGH, SPI interface is now available.

4. To program the device via the SPI interface:

–

Select / Unlock the LM2512A, Write FF’h to REG 16’h

–

LUT registers are now accessible

–

If Lane Scale Register needs to be modified, this is accessed through bit 4 of the Command register.

–

A write to REG 16’h on any other value besides FF’h will de-select / lock the LM2512A’s SPI

Copyright © 2007–2013, Texas Instruments Incorporated

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Product Folder Links: LM2512A