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MSO5000B Datasheet(PDF) 14 Page - List of Unclassifed Manufacturers

Part # MSO5000B
Description  Mixed Signal Oscilloscopes
PDF  28 Pages
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Manufacturer  ETC2 [List of Unclassifed Manufacturers]
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Trigger level range
Any channel
±8 divisions from center of screen
External (auxiliary input)
±8 V
Line
Fixed at about 50% of line voltage
Trigger modes
Edge
Positive or negative slope on any channel or front-panel auxiliary input. Coupling includes DC, AC, HF reject, LF reject, and noise
reject
Glitch
Trigger on or reject glitches of positive, negative, or either polarity. Programmable glitch width is 4 ns minimum to 8 s maximum
Runt
Trigger on a pulse that crosses one threshold but fails to cross a second threshold before crossing the first again
Width
Trigger on width of positive or negative pulse either within or outside selectable limits (4 ns to 8 s)
Timeout
Trigger on an event which remains high, low, or either, for a specified time period (4 ns to 8 s)
Transition
Trigger on pulse edge rates that are faster or slower than specified. Slope may be positive, negative, or either
Setup/Hold
Trigger on violations of both setup time and hold time between clock and data present on any two input channels
Pattern
Trigger when any logical pattern of signals goes false or stays true for specified period of time (4 ns to 1 s). Pattern (AND, OR,
NAND, NOR) specified for all analog and digital input channels defined as High, Low, or Don't Care
Parallel Bus
Trigger on specified data value on defined parallel bus
State
Any logical pattern of analog channels and digital channels (MSO models) clocked by edge on another channel. Trigger on rising
or falling clock edge
Video
Trigger on all lines, specific line number, odd, even, or all fields on NTSC, PAL, SECAM, and HDTV 480p/60, 576p/50, 875i/60,
720p/30, 720p/50, 720p/60, 1080/24sF, 1080i/50, 1080p/25, 1080i/60, 1080p/24, 1080p/25, 1080p/50, 1080p/60, Bi-level, Tri-level
Trigger Sequences
Main, Delayed by Time, Delayed by Events. All sequences can include separate horizontal delay after the trigger event to position
the acquisition window in time
A/B Sequence Event Trigger
Types
Edge
Trigger Delay by Time
4 ns to 8 s
Trigger Delay by Events
1 to 4,000,000 events
Visual Trigger
Trigger on up to 8 user-specified areas, including rectangle, triangle, trapezoid, hexagon, and user-specified shapes on any of the
analog channels
I2C (Optional)
Provided as part of Opt. SR-EMBD. Trigger on Start, Repeated Start, Stop, Missing ACK, Address (7 or 10 bit), Data, or Address
and Data on I2C buses up to 10 Mb/s
SPI (Optional)
Provided as part of Opt. SR-EMBD. Trigger on Slave Select, Idle Time, or Data (1-16 words) on SPI buses up to 10 Mb/s
CAN (Optional)
Provided as part of Opt. SR-AUTO. Trigger on Start of Frame, Type of Frame (Data, Remote, Error, or Overload), Identifier, Data,
Identifier and Data, EOF, Missing Ack, Bit Stuff Error, and CRC Error on CAN buses up to 1 Mb/s
LIN (Optional)
Provided as part of Opt. SR-AUTO. Trigger on Sync, Identifier, Data, Identifier and Data, Wakeup Frame, Sleep Frame, and Error
on LIN buses up to 1 Mb/s
FlexRay (Optional)
Provided as part of Opt. SR-AUTO. Trigger on Indicator Bits (Normal, Payload, Null, Sync, Startup), Cycle Count, Header Fields
(Indicator Bits, Identifier, Payload Length, Header CRC, and Cycle Count), Identifier, Data, Identifier and Data, End Of Frame, and
Error on FlexRay buses up to 10 Mb/s
MIL-STD-1553 (Optional)
Provided as part of Opt. SR-AERO. Trigger on Sync, Command Word, Status Word, Data Word, Idle Time, and Error on MIL-
STD-1553 buses up to 1 Mb/s
Ethernet (Optional)
Provided as part of Opt. SR-ENET. Trigger on Start of Packet, MAC Address, MAC Q-tag, MAC Length/Type, MAC Data, IP
Header, TCP Header,
TCP/IPV4 Data, End of Packet, and FCS(CRC) Error on 10BASE-T and 100BASE-TX buses.
RS-232/422/485/UART
(Optional)
Provided as part of Opt. SR-COMP. Trigger on Start Bit, End of Packet, Data, and Parity Error up to 10 Mb/s
Datasheet
Trigger system
14 www.tektronix.com



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