AM186 datasheet(57/112 Pages) AMD

57 / 112 page

Am186TMER and Am188TMER Microcontrollers Data Sheet

DRAF

registers are used to control and monitor the interface.

Refer to Figure 14 and Figure 15 on page 58 for dia-

grams of SSI reads and writes.

Four-Pin Interface

The two enable pins SDEN1–SDEN0 can be used di-

rectly as enables for up to two peripheral devices.

Transmit and receive operations are synchronized be-

tween the master (Am186ER or Am188ER microcon-

troller) and slave (peripherals) by means of the SCLK

output. SCLK is derived from the internal processor

clock and is the processor clock divided by 2, 4, 8, or

16.

PROGRAMMABLE I/O (PIO) PINS

There are 32 pins on the Am186ER and Am188ER mi-

crocontrollers that are available as multipurpose sig-

nals. Table 3 and Table 4 on page 36 list the PIO pins.

Each of these pins can be used as a user-programma-

ble input or output signal if the normal shared function

is not needed.

If a pin is enabled to function as a PIO signal, the pre-

assigned signal function is disabled and does not affect

the level on the pin. A PIO signal can be configured to

operate as an input (with or without a weak pullup or

pulldown), as an output, or as an open-drain output.

Configuration as an open-drain output is accomplished

by keeping the appropriate PDATA bits constant in the

PIO data register and writing the data value into its as-

sociated bit position in the PIO direction register, so the

output is either driving Low or is disabled, depending

on the data.

After power-on reset, the PIO pins default to various

configurations. The column titled

Power-On Reset Sta-

tus in Table 3 and Table 4 on page 36 lists the defaults

for the PIOs. The system initialization code must recon-

figure the PIOs as required.

Note: WDT reset does not reset PIO registers.

The A19–A17 address pins default to normal operation

on power-on reset, allowing the processor to correctly

begin fetching instructions at the boot address

FFFF0h. The DT/R, DEN, and SRDY pins also default

to normal operation on power-on reset.

Note that emulators use A19, A18, A17, S6, and UZI.

System designers using these signals as PIOs should

check with their emulator vendor for limitations on em-

ulator operation.

If the AD15–AD0 bus override is enabled on power-on

reset, then S6/CLKSEL2 and UZI/CLKSEL1 revert to

normal operation instead of PIO input with pullup. Many

emulators assert the ADEN override. If BHE/ADEN

( A m186E R micr ocontr o ller ) or R F SH 2/ADEN

(Am188ER microcontroller) is held Low during power-

on reset, the AD15–AD0 bus override is enabled.

AM186 Datasheet(PDF) 57 Page - Advanced Micro Devices

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