LXT9785 datasheet(3/244 Pages) ETC2

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Cortina Systems® LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers

LXT9785/LXT9785E

Datasheet

249241, Revision 12.0

04 November 2011

Contents

1.0

Introduction.................................................................................................................................. 19

1.1

What You Will Find in This Document ................................................................................ 19

1.2

Related Documents ............................................................................................................19

2.0

Block Diagram ............................................................................................................................. 20

3.0

Pin/Ball Assignments and Signal Descriptions........................................................................ 21

3.1

PQFP Pin Assignments ...................................................................................................... 21

3.1.1

PQFP Pin Assignments – RMII Configuration ....................................................... 22

3.1.2

PQFP Pin Assignments – SMII Configuration ....................................................... 29

3.1.3

PQFP Pin Assignments – SS-SMII Configuration ................................................. 36

3.2

PQFP Signal Descriptions .................................................................................................. 43

3.2.1

Signal Name Conventions ..................................................................................... 43

3.2.2

PQFP Signal Descriptions – RMII, SMII, and SS-SMII Configurations.................. 43

3.3

BGA23 Ball Assignments.................................................................................................... 58

3.3.1

RMII BGA23 Ball List ............................................................................................. 58

3.3.2

SMII BGA23 Ball List ............................................................................................. 74

3.3.3

SS-SMII BGA23 Ball List ....................................................................................... 89

3.4

BGA23 Signal Descriptions .............................................................................................. 104

3.4.1

Signal Name Conventions ................................................................................... 104

3.4.2

Signal Descriptions – RMII, SMII, and SS-SMII Configurations .......................... 105

3.5

BGA15 Ball Assignments.................................................................................................. 120

3.5.1

BGA15 Ball List.................................................................................................... 120

3.6

BGA15 Signal Descriptions .............................................................................................. 132

3.6.1

Signal Name Conventions ................................................................................... 132

3.6.2

Signal Descriptions – SMII and SS-SMII Configurations ..................................... 132

4.0

Functional Description.............................................................................................................. 139

4.1

Introduction ....................................................................................................................... 139

4.1.1

OSP™ Architecture ............................................................................................. 139

4.1.2

Comprehensive Functionality .............................................................................. 140

4.1.2.1

Sectionalization.................................................................................... 140

4.2

Interface Descriptions .......................................................................................................140

4.2.1

10/100 Network Interface..................................................................................... 140

4.2.1.1

Twisted-Pair Interface .......................................................................... 141

4.2.1.2

MDI Crossover (MDIX)......................................................................... 142

4.2.1.3

Fiber Interface...................................................................................... 142

4.3

Media Independent Interface (MII) Interfaces................................................................... 142

4.3.1

Global MII Mode Select ....................................................................................... 142

4.3.2

Internal Loopback ................................................................................................ 143

4.3.3

RMII Data Interface.............................................................................................. 143

4.3.4

Serial Media Independent Interface (SMII) and Source Synchronous- Serial Media In-

dependent Interface (SS-SMII) ............................................................................ 144

4.3.4.1

SMII Interface....................................................................................... 144

4.3.4.2

Source Synchronous-Serial Media Independent Interface .................. 144

4.3.5

Configuration Management Interface .................................................................. 144

4.3.6

MII Isolate ............................................................................................................ 144

4.3.7

MDIO Management Interface .............................................................................. 144

4.3.8

MII Sectionalization.............................................................................................. 146

4.3.9

MII Interrupts........................................................................................................ 146

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